Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5299_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size6685
Compressed Size1297
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 6677
Compressed Size1308
Max. Term Depth4
Asserts 17
Declared Functions0
Declared Constants18
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or1 =24 str.++4 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.12429 0.12466
cvc5 cvc5-fixed_default sat ✅ 0.07351 0.07402
Z3 z3-4.8.11_default sat ✅ 0.05865 0.05858
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 3.21909 3.21924
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.04166 0.04217
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.06268 0.06310
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 5.28125 15.50550
Z3alpha z3alpha_default sat ✅ 1.84065 1.84064
Z3-Noodler Z3-Noodler_default sat ✅ 0.05275 0.05270
Z3-Noodler_default sat ✅ 0.05196 0.05191
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.24569 0.14591
OSTRICH OSTRICH sat ✅ 3.68955 9.99932
Z3alpha Z3-alpha sat ✅ 0.58549 0.48564
Z3-Noodler Z3-Noodler sat ✅ 0.27014 0.17029