Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4749_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size1667
Compressed Size737
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 1659
Compressed Size746
Max. Term Depth4
Asserts 5
Declared Functions0
Declared Constants5
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=4 str.++2 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.02798 0.02824
cvc5 cvc5-fixed_default sat ✅ 0.03102 0.03160
Z3 z3-4.8.11_default sat ✅ 0.03387 0.03380
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 1.18151 1.18155
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.03762 0.03259
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.03429 0.03469
OSTRICH OSTRICH 1.2_def sat ✅ 2.67108 6.42653
Z3 z3-4.8.17_default sat ✅ 0.03505 0.03685
Z3string Z3str4_default sat ✅ 0.03303 0.03311
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.02318 0.02365
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.03242 0.03294
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 2.66772 6.19763
Z3alpha z3alpha_default sat ✅ 0.03624 0.03599
Z3-Noodler Z3-Noodler_default sat ✅ 0.03532 0.03526
Z3-Noodler_default sat ✅ 0.03456 0.03449
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.23580 0.13637
OSTRICH OSTRICH sat ✅ 2.23946 4.99947
Z3alpha Z3-alpha sat ✅ 0.27500 0.17527
Z3-Noodler Z3-Noodler sat ✅ 0.24247 0.14264