Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_3785_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size4813
Compressed Size1020
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 4805
Compressed Size1016
Max. Term Depth4
Asserts 24
Declared Functions0
Declared Constants29
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or3 =26 str.++12 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.28299 0.28332
cvc5 cvc5-fixed_default sat ✅ 0.12942 0.12990
Z3 z3-4.8.11_default sat ✅ 0.09382 0.09377
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 2.17902 2.17922
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.10486 0.10493
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.14776 0.14829
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 5.53589 16.16320
Z3alpha z3alpha_default sat ✅ 23.10940 23.10540
Z3-Noodler Z3-Noodler_default sat ✅ 0.05002 0.04995
Z3-Noodler_default sat ✅ 0.04752 0.04745
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.28053 0.18112
OSTRICH OSTRICH sat ✅ 3.47618 9.32660
Z3alpha Z3-alpha sat ✅ 1176.19015 1175.55451
Z3-Noodler Z3-Noodler sat ✅ 0.28467 0.18410