Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_3052_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size12732
Compressed Size2217
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 12724
Compressed Size2233
Max. Term Depth4
Asserts 12
Declared Functions0
Declared Constants13
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=11 str.++6 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 CVC4 CVC4-sq-final_default sat ✅ 0.28827 0.28854
Z3string Z3str4 SMTCOMP2020 v1.1_default sat ✅ 10.58570 11.28120
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.29265 0.29298
cvc5 cvc5-fixed_default sat ✅ 0.12189 0.12241
Z3 z3-4.8.11_default sat ✅ 0.11738 0.11732
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 10.01060 10.00750
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.29661 0.29421
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.05201 0.05261
OSTRICH OSTRICH 1.2_def sat ✅ 5.30934 15.53820
Z3 z3-4.8.17_default sat ✅ 0.17895 0.17949
Z3string Z3str4_default sat ✅ 0.42091 0.42094