Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4061_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size3230
Compressed Size887
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 3222
Compressed Size889
Max. Term Depth4
Asserts 11
Declared Functions0
Declared Constants13
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=10 str.++6 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.04890 0.04918
cvc5 cvc5-fixed_default sat ✅ 0.05448 0.05494
Z3 z3-4.8.11_default sat ✅ 0.04615 0.04610
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 1.95767 1.95768
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.04892 0.04915
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.06800 0.06817
OSTRICH OSTRICH 1.2_def sat ✅ 5.53560 16.07500
Z3 z3-4.8.17_default sat ✅ 0.05149 0.05309
Z3string Z3str4_default sat ✅ 0.08006 0.08014
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.04395 0.04454
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.07031 0.07075
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 5.38763 15.63180
Z3alpha z3alpha_default sat ✅ 0.04143 0.04147
Z3-Noodler Z3-Noodler_default sat ✅ 0.04294 0.04285
Z3-Noodler_default sat ✅ 0.03866 0.03862