Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_3689_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size4325
Compressed Size1088
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 4317
Compressed Size1097
Max. Term Depth4
Asserts 25
Declared Functions0
Declared Constants27
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or2 =28 str.++10 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.08028 0.08057
cvc5 cvc5-fixed_default sat ✅ 0.06114 0.06160
Z3 z3-4.8.11_default sat ✅ 0.05652 0.05642
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 1.71002 1.71005
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.06884 0.06914
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.08901 0.08955
OSTRICH OSTRICH 1.2_def sat ✅ 5.14288 14.93250
Z3 z3-4.8.17_default sat ✅ 0.05929 0.06107
Z3string Z3str4_default sat ✅ 0.08070 0.08072
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.24347 0.14399
OSTRICH OSTRICH sat ✅ 3.50357 9.25248
Z3alpha Z3-alpha sat ✅ 214.26598 214.10512
Z3-Noodler Z3-Noodler sat ✅ 0.25017 0.15032