Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_532_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size1583
Compressed Size689
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 1575
Compressed Size692
Max. Term Depth4
Asserts 9
Declared Functions0
Declared Constants11
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=8 str.++4 str.replace1 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 CVC4 CVC4-sq-final_default sat ✅ 0.02630 0.02657
Z3string Z3str4 SMTCOMP2020 v1.1_default sat ✅ 1.08608 3.49252
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.03112 0.02816
cvc5 cvc5-fixed_default sat ✅ 0.02964 0.03017
Z3 z3-4.8.11_default sat ✅ 0.03925 0.03920
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 0.05305 0.05316
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.24396 0.14452
OSTRICH OSTRICH sat ✅ 3.52340 9.26316
Z3alpha Z3-alpha sat ✅ 0.27629 0.17657
Z3-Noodler Z3-Noodler sat ✅ 0.26257 0.16278