Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_3793_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size6834
Compressed Size1415
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 6826
Compressed Size1418
Max. Term Depth4
Asserts 59
Declared Functions0
Declared Constants74
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or10 =94 str.++30 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 11.37300 11.37290
cvc5 cvc5-fixed_default sat ✅ 8.21948 8.21402
Z3 z3-4.8.11_default sat ✅ 0.06276 0.06271
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 0.16174 0.16183
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 310.01100 301.30700
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 313.02900 301.48600
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 92.53240 161.46800
Z3alpha z3alpha_default sat ✅ 0.20624 0.20625
Z3-Noodler Z3-Noodler_default sat ✅ 0.07297 0.07292
Z3-Noodler_default sat ✅ 0.06880 0.06873
SMT-COMP 2025 cvc5 cvc5 sat ✅ 93.44455 93.30237
OSTRICH OSTRICH sat ✅ 8.46349 18.84809
Z3alpha Z3-alpha sat ✅ 0.41694 0.39547
Z3 Z3-alpha-base sat ✅ 0.33834 0.20760
Z3-Noodler-base sat ✅ 0.28598 0.16911
Z3-Noodler Z3-Noodler sat ✅ 0.30514 0.18272
Z3-Noodler-Mocha-base sat ✅ 0.30453 0.18154
Z3-Noodler-Mocha Z3-Noodler-Mocha sat ✅ 0.30592 0.18122