Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_690_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size4388
Compressed Size1115
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 4380
Compressed Size1109
Max. Term Depth4
Asserts 26
Declared Functions0
Declared Constants29
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=25 str.++13 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.04345 0.04376
cvc5 cvc5-fixed_default sat ✅ 0.04352 0.04401
Z3 z3-4.8.11_default sat ✅ 0.08090 0.08008
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 2.10227 2.10210
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.04275 0.04307
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.05067 0.05125
OSTRICH OSTRICH 1.2_def sat ✅ 4.73688 13.75690
Z3 z3-4.8.17_default sat ✅ 0.04801 0.04983
Z3string Z3str4_default sat ✅ 0.07720 0.07716
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.22817 0.12852
OSTRICH OSTRICH sat ✅ 3.15257 8.31133
Z3alpha Z3-alpha sat ✅ 0.32441 0.22451
Z3-Noodler Z3-Noodler sat ✅ 0.26981 0.16980