Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4255_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size4901
Compressed Size1173
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 4893
Compressed Size1177
Max. Term Depth4
Asserts 23
Declared Functions0
Declared Constants34
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or2 =24 str.++12 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 CVC4 CVC4-sq-final_default sat ✅ 0.11368 0.11398
Z3string Z3str4 SMTCOMP2020 v1.1_default sat ✅ 2.31425 2.78664
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.10789 0.10819
cvc5 cvc5-fixed_default sat ✅ 0.10470 0.10529
Z3 z3-4.8.11_default sat ✅ 0.08133 0.08130
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 2.18015 4.28007
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.12298 0.12231
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.14359 0.14386
OSTRICH OSTRICH 1.2_def sat ✅ 5.21130 15.07370
Z3 z3-4.8.17_default sat ✅ 9.43409 9.43537
Z3string Z3str4_default sat ✅ 24.36540 24.36300
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.08588 0.08610
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.12804 0.12859
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 5.90326 17.35900
Z3alpha z3alpha_default sat ✅ 23.11780 23.11340
Z3-Noodler Z3-Noodler_default sat ✅ 0.06987 0.06983
Z3-Noodler_default sat ✅ 0.06731 0.06722