Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4373_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size1631
Compressed Size715
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 1623
Compressed Size726
Max. Term Depth4
Asserts 5
Declared Functions0
Declared Constants5
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=4 str.++2 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.02822 0.02851
cvc5 cvc5-fixed_default sat ✅ 0.02874 0.02931
Z3 z3-4.8.11_default sat ✅ 0.05798 0.05724
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 1.14452 1.14447
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.02315 0.02373
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.03262 0.03310
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 2.64330 6.30678
Z3alpha z3alpha_default sat ✅ 0.02099 0.02103
Z3-Noodler Z3-Noodler_default sat ✅ 0.03425 0.03422
Z3-Noodler_default sat ✅ 0.03417 0.03409
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.24112 0.14153
OSTRICH OSTRICH sat ✅ 2.41467 5.43346
Z3alpha Z3-alpha sat ✅ 0.30516 0.20538
Z3-Noodler Z3-Noodler sat ✅ 0.25140 0.15154