Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5312_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size3994
Compressed Size996
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 3986
Compressed Size1000
Max. Term Depth4
Asserts 10
Declared Functions0
Declared Constants11
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=9 str.++5 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 CVC4 CVC4-sq-final_default sat ✅ 0.04514 0.04547
Z3string Z3str4 SMTCOMP2020 v1.1_default sat ✅ 1.95278 2.30686
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.04528 0.04557
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.04841 0.04883
OSTRICH OSTRICH 1.2_def sat ✅ 3.63038 9.59442
Z3 z3-4.8.17_default sat ✅ 0.05329 0.05480
Z3string Z3str4_default sat ✅ 0.06033 0.06038
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.03163 0.03219
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.04834 0.04887
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 3.76299 10.53460
Z3alpha z3alpha_default sat ✅ 0.04871 0.04879
Z3-Noodler Z3-Noodler_default sat ✅ 0.04345 0.04341
Z3-Noodler_default sat ✅ 0.04161 0.04152