Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_3191_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size2708
Compressed Size812
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 2700
Compressed Size813
Max. Term Depth4
Asserts 11
Declared Functions0
Declared Constants13
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=10 str.++6 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 CVC4 CVC4-sq-final_default sat ✅ 0.04550 0.04578
Z3string Z3str4 SMTCOMP2020 v1.1_default sat ✅ 0.99618 1.18364
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.05391 0.04986
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.06831 0.06791
OSTRICH OSTRICH 1.2_def sat ✅ 5.20231 14.70880
Z3 z3-4.8.17_default sat ✅ 0.05043 0.05218
Z3string Z3str4_default sat ✅ 1.64850 1.64829
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.24409 0.14449
OSTRICH OSTRICH sat ✅ 3.31856 8.68964
Z3alpha Z3-alpha sat ✅ 0.29035 0.19085
Z3-Noodler Z3-Noodler sat ✅ 0.24696 0.14697