Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4745_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size1567
Compressed Size701
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 1559
Compressed Size713
Max. Term Depth4
Asserts 6
Declared Functions0
Declared Constants7
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or1 =6 str.++2 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.03640 0.03675
cvc5 cvc5-fixed_default sat ✅ 0.03801 0.03857
Z3 z3-4.8.11_default sat ✅ 0.03342 0.03337
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 1.22924 1.17708
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.03708 0.03739
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.04923 0.04959
OSTRICH OSTRICH 1.2_def sat ✅ 2.65779 6.27392
Z3 z3-4.8.17_default sat ✅ 0.03375 0.03550
Z3string Z3str4_default sat ✅ 0.03126 0.03136
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.24825 0.14869
OSTRICH OSTRICH sat ✅ 2.31192 5.24386
Z3alpha Z3-alpha sat ✅ 0.27527 0.17532
Z3-Noodler Z3-Noodler sat ✅ 0.27253 0.17222