Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_1828_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size6192
Compressed Size1384
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 6184
Compressed Size1388
Max. Term Depth4
Asserts 52
Declared Functions0
Declared Constants64
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or6 =61 str.++22 str.replace4
re.allchar2 str.to_re1 re.*2 re.++2
str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 49.12150 49.06170
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 3.43088 3.42679
OSTRICH OSTRICH 1.2_def sat ✅ 5.36024 15.66050
Z3 z3-4.8.17_default sat ✅ 0.04788 0.04963
Z3string Z3str4_default sat ✅ 0.04572 0.04556
SMT-COMP 2025 cvc5 cvc5 sat ✅ 22.03271 21.91238
OSTRICH OSTRICH sat ✅ 8.37479 24.01558
Z3alpha Z3-alpha sat ✅ 0.42857 0.35415
Z3 Z3-alpha-base sat ✅ 1.47460 1.35284
Z3-Noodler-base sat ✅ 0.29305 0.17521
Z3-Noodler Z3-Noodler sat ✅ 0.26132 0.14519
Z3-Noodler-Mocha-base sat ✅ 0.29796 0.16850
Z3-Noodler-Mocha Z3-Noodler-Mocha sat ✅ 0.29419 0.17405