Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5322_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size6536
Compressed Size1244
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 6528
Compressed Size1243
Max. Term Depth4
Asserts 11
Declared Functions0
Declared Constants13
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=10 str.++6 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.11409 0.11439
cvc5 cvc5-fixed_default sat ✅ 0.07513 0.07565
Z3 z3-4.8.11_default sat ✅ 0.05783 0.05777
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 3.62273 3.62235
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.11455 0.11489
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.06840 0.06849
OSTRICH OSTRICH 1.2_def sat ✅ 6.01165 17.67200
Z3 z3-4.8.17_default sat ✅ 0.06339 0.06520
Z3string Z3str4_default sat ✅ 0.26354 0.26361
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.23620 0.13658
OSTRICH OSTRICH sat ✅ 3.67452 10.05771
Z3alpha Z3-alpha sat ✅ 0.45657 0.35685
Z3-Noodler Z3-Noodler sat ✅ 0.28893 0.18979