Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5412_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size1885
Compressed Size777
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 1877
Compressed Size778
Max. Term Depth4
Asserts 7
Declared Functions0
Declared Constants7
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=6 str.++3 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.02810 0.02845
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.03414 0.03460
OSTRICH OSTRICH 1.2_def sat ✅ 3.24430 8.57445
Z3 z3-4.8.17_default sat ✅ 0.03742 0.03899
Z3string Z3str4_default sat ✅ 0.02890 0.02896
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.02308 0.02354
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.03285 0.03340
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 3.13323 8.24668
Z3alpha z3alpha_default sat ✅ 0.02089 0.02097
Z3-Noodler Z3-Noodler_default sat ✅ 0.03757 0.03739
Z3-Noodler_default sat ✅ 0.03453 0.03449
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.24225 0.14264
OSTRICH OSTRICH sat ✅ 2.58834 6.15721
Z3alpha Z3-alpha sat ✅ 0.28079 0.18092
Z3-Noodler Z3-Noodler sat ✅ 0.24252 0.14259