Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4643_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size8759
Compressed Size1413
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 8751
Compressed Size1407
Max. Term Depth4
Asserts 34
Declared Functions0
Declared Constants44
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or1 =34 str.++20 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.28730 0.28745
cvc5 cvc5-fixed_default sat ✅ 0.22907 0.22961
Z3 z3-4.8.11_default sat ✅ 24.55860 24.55920
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 4.86974 4.86988
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 1.31218 1.31068
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 1.37389 1.37437
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 35.59250 86.73580
Z3alpha z3alpha_default sat ✅ 23.14380 23.14180
Z3-Noodler Z3-Noodler_default sat ✅ 0.06949 0.06947
Z3-Noodler_default sat ✅ 0.06618 0.06614
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.45481 0.35438
OSTRICH OSTRICH sat ✅ 4.18071 11.32575
Z3alpha Z3-alpha sat ✅ 1141.06797 1140.76589
Z3-Noodler Z3-Noodler sat ✅ 0.27750 0.17693