Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5292_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size13957
Compressed Size2134
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 13949
Compressed Size2180
Max. Term Depth4
Asserts 17
Declared Functions0
Declared Constants18
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or1 =24 str.++4 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.68501 0.68535
cvc5 cvc5-fixed_default sat ✅ 0.24658 0.24707
Z3 z3-4.8.11_default sat ✅ 0.12691 0.12686
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 7.71554 7.71579
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.04157 0.04208
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.06731 0.06467
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 6.07527 17.97600
Z3alpha z3alpha_default sat ✅ 0.13649 0.13654
Z3-Noodler Z3-Noodler_default sat ✅ 0.13486 0.13281
Z3-Noodler_default sat ✅ 0.13421 0.13310
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.25043 0.15106
OSTRICH OSTRICH sat ✅ 3.87427 10.74906
Z3alpha Z3-alpha sat ✅ 2.60185 2.50079
Z3-Noodler Z3-Noodler sat ✅ 0.32983 0.22984