Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_3524_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size8226
Compressed Size1511
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 8218
Compressed Size1460
Max. Term Depth4
Asserts 80
Declared Functions0
Declared Constants90
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=79 str.++44 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 CVC4 CVC4-sq-final_default sat ✅ 1.41040 1.40952
Z3string Z3str4 SMTCOMP2020 v1.1_default sat ✅ 10.52810 11.23050
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.95613 0.95622
cvc5 cvc5-fixed_default sat ✅ 0.98939 0.98464
Z3 z3-4.8.11_default sat ✅ 0.05527 0.05522
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 4.87938 4.87945
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 1.59108 1.59131
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.78009 0.78068
OSTRICH OSTRICH 1.2_def sat ✅ 25.28930 46.02930
Z3 z3-4.8.17_default sat ✅ 0.05688 0.05869
Z3string Z3str4_default sat ✅ 0.08345 0.08350
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.70462 0.70502
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.78216 0.77737
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 28.05180 67.18080
Z3alpha z3alpha_default sat ✅ 23.10040 23.09800
Z3-Noodler Z3-Noodler_default sat ✅ 0.05677 0.05673
Z3-Noodler_default sat ✅ 0.05339 0.05330