Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_5360_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size21473
Compressed Size2300
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 21465
Compressed Size2313
Max. Term Depth4
Asserts 34
Declared Functions0
Declared Constants41
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=33 str.++20 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.87375 0.69534
cvc5 cvc5-fixed_default sat ✅ 0.53804 0.53851
Z3 z3-4.8.11_default sat ✅ 0.70707 0.70705
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 27.67720 27.67520
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.28804 0.28847
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.35002 0.35060
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 49.11970 97.15240
Z3alpha z3alpha_default sat ✅ 23.34070 23.33450
Z3-Noodler Z3-Noodler_default sat ✅ 0.14506 0.14496
Z3-Noodler_default sat ✅ 0.13001 0.12993
SMT-COMP 2025 cvc5 cvc5 sat ✅ 0.35033 0.22525
OSTRICH OSTRICH sat ✅ 13.00891 32.46886
Z3alpha Z3-alpha sat ✅ 0.60860 0.73457
Z3 Z3-alpha-base sat ✅ 0.90290 0.77007
Z3-Noodler-base unknown ❌ 1201.40192 1201.15300
Z3-Noodler Z3-Noodler sat ✅ 0.38664 0.25420
Z3-Noodler-Mocha-base sat ✅ 0.35535 0.23624
Z3-Noodler-Mocha Z3-Noodler-Mocha sat ✅ 0.34708 0.22647