Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_2133_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size24217
Compressed Size3221
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 24209
Compressed Size3235
Max. Term Depth4
Asserts 182
Declared Functions0
Declared Constants211
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or24 =232 str.++75 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 0.25 (3/4) CVC4 CVC4-sq-final_default sat ✅ 307.94900 300.87700
cvc5 cvc5-fixed_default sat ✅ 312.05000 300.94000
Z3 z3-4.8.11_default sat ✅ 0.12940 0.12937
Z3string Z3str4 SMTCOMP 2021 v1.1_default unknown ❌ 1200.03000 1199.85000
SMT-COMP 2024 cvc5 cvc5 sat ✅ 99.98797 99.88408
OSTRICH OSTRICH sat ✅ 4.05483 11.86669
Z3alpha Z3-alpha sat ✅ 1143.96918 1143.82169
Z3-Noodler Z3-Noodler sat ✅ 0.28881 0.18868
SMT-COMP 2025 cvc5 cvc5 sat ✅ 133.57989 133.44112
OSTRICH OSTRICH sat ✅ 9.29032 28.26752
Z3alpha Z3-alpha sat ✅ 0.54336 0.74758
Z3 Z3-alpha-base sat ✅ 2.45085 2.31995
Z3-Noodler-base unknown ❌ 1201.35390 1201.05084
Z3-Noodler Z3-Noodler sat ✅ 0.34216 0.21564
Z3-Noodler-Mocha-base sat ✅ 0.31890 0.20159
Z3-Noodler-Mocha Z3-Noodler-Mocha sat ✅ 0.33410 0.21040