Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_286_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size1481
Compressed Size672
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 1473
Compressed Size678
Max. Term Depth4
Asserts 5
Declared Functions0
Declared Constants5
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

=4 str.++2 re.allchar2 str.to_re1
re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.02981 0.02976
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.03457 0.03480
OSTRICH OSTRICH 1.2_def sat ✅ 2.59258 6.01528
Z3 z3-4.8.17_default sat ✅ 0.06152 0.06394
Z3string Z3str4_default sat ✅ 0.02893 0.02899
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.02356 0.02393
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.03328 0.03368
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 2.56301 5.62602
Z3alpha z3alpha_default sat ✅ 0.02017 0.02022
Z3-Noodler Z3-Noodler_default sat ✅ 0.03508 0.03500
Z3-Noodler_default sat ✅ 0.03393 0.03385
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.22347 0.12394
OSTRICH OSTRICH sat ✅ 2.33977 5.17955
Z3alpha Z3-alpha sat ✅ 0.29567 0.19591
Z3-Noodler Z3-Noodler sat ✅ 0.26699 0.16706