Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4640_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size10503
Compressed Size1566
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 10495
Compressed Size1551
Max. Term Depth4
Asserts 44
Declared Functions0
Declared Constants58
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or2 =45 str.++26 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 7.29173 7.29003
cvc5 cvc5-fixed_default sat ✅ 6.41804 6.41786
Z3 z3-4.8.11_default sat ✅ 0.37941 0.37936
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 6.47790 6.47230
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 26.80350 24.30890
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 72.97710 72.98130
OSTRICH OSTRICH 1.2_def sat ✅ 89.69550 122.53400
Z3 z3-4.8.17_default sat ✅ 0.25267 0.25456
Z3string Z3str4_default sat ✅ 0.51576 0.51582
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 11.67680 11.67780
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 11.39890 11.39890
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 78.81930 149.85800
Z3alpha z3alpha_default sat ✅ 23.21320 23.21120
Z3-Noodler Z3-Noodler_default sat ✅ 0.08076 0.08071
Z3-Noodler_default sat ✅ 0.07445 0.07437
SMT-COMP 2024 cvc5 cvc5 sat ✅ 83.43343 83.29697
OSTRICH OSTRICH sat ✅ 4.27245 12.15470
Z3alpha Z3-alpha sat ✅ 1170.80927 1170.67906
Z3-Noodler Z3-Noodler sat ✅ 0.27733 0.17699