Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_4199_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size1920
Compressed Size757
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 1912
Compressed Size767
Max. Term Depth4
Asserts 10
Declared Functions0
Declared Constants11
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or1 =12 str.++3 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 0.05108 0.05138
cvc5 cvc5-fixed_default sat ✅ 0.05406 0.05458
Z3 z3-4.8.11_default sat ✅ 0.03707 0.03703
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 1.17770 1.17774
SMT-COMP 2022 CVC4 CVC4-sq-final_default sat ✅ 0.03994 0.04026
cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.05348 0.05405
OSTRICH OSTRICH 1.2_def sat ✅ 2.31875 5.43142
Z3 z3-4.8.17_default sat ✅ 0.03899 0.04074
Z3string Z3str4_default sat ✅ 0.03022 0.03029
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.04784 0.04834
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.06632 0.06692
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 2.40856 5.53117
Z3alpha z3alpha_default sat ✅ 0.14298 0.14300
Z3-Noodler Z3-Noodler_default sat ✅ 0.03644 0.03639
Z3-Noodler_default sat ✅ 0.03565 0.03549