Benchmark

non-incremental/QF_S/2019-Jiang/slog/slog_stranger_774_sink.smt2

Publication:
Hung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, Jie-Hong R. Jiang:
String Analysis via Automata Manipulation with Logic Circuit Representation. CAV (1) 2016: 241-260.
Benchmark
Size8939
Compressed Size1881
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2020-07-06
Generated ByHung-En Wang, Tzung-Lin Tsai, Chun-Han Lin, Fang Yu, and Jie-Hong R. Jiang
Generated On2019-02-28 00:00:00
GeneratorStranger
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status sat
Size 8931
Compressed Size1874
Max. Term Depth4
Asserts 57
Declared Functions0
Declared Constants85
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

or9 =68 str.++26 re.allchar2
str.to_re1 re.*2 re.++2 str.in_re1

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2020 CVC4 CVC4-sq-final_default sat ✅ 2.45003 2.44996
Z3string Z3str4 SMTCOMP2020 v1.1_default sat ✅ 4.14377 4.84123
SMT-COMP 2021 CVC4 CVC4-sq-final_default sat ✅ 1.25367 1.01105
cvc5 cvc5-fixed_default sat ✅ 1.28263 1.28325
Z3 z3-4.8.11_default sat ✅ 0.08725 0.08718
Z3string Z3str4 SMTCOMP 2021 v1.1_default sat ✅ 2.32913 2.32914
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 0.71590 0.71483
cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 0.77908 0.77968
OSTRICH OSTRICH 1.3 SMT-COMP fixed_def sat ✅ 21.78980 59.34400
Z3alpha z3alpha_default sat ✅ 23.26960 23.26980
Z3-Noodler Z3-Noodler_default sat ✅ 0.08578 0.08569
Z3-Noodler_default sat ✅ 0.08203 0.08199