Benchmark

non-incremental/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.3.prop1_ab_cti_max.smt2

Generated by the tool Averroes 2 (successor of [1]) which implements safety property
verification on hardware systems.

This SMT problem belongs to a set of SMT problems generated by applying Averroes 2
to benchmarks derived from [2-5].

A total of 412 systems (345 from [2], 19 from [3], 26 from [4], 22 from [5]) were
syntactically converted from their original formats (using [6, 7]), and given to 
Averroes 2 to perform property checking with abstraction (wide bit-vectors -> terms, 
wide operators -> UF) using SMT solvers [8, 9].

[1] Lee S., Sakallah K.A. (2014) Unbounded Scalable Verification Based on Approximate
Property-Directed Reachability and Datapath Abstraction. In: Biere A., Bloem R. (eds)
Computer Aided Verification. CAV 2014. Lecture Notes in Computer Science, vol 8559.
Springer, Cham
[2] http://fmv.jku.at/aiger/index.html#beem
[3] http://www.cs.cmu.edu/~modelcheck/vcegar
[4] http://www.cprover.org/hardware/v2c
[5] http://github.com/aman-goel/verilogbench
[6] http://www.clifford.at/yosys
[7] http://github.com/chengyinwu/V3
[8] http://github.com/Z3Prover/z3
[9] http://github.com/SRI-CSL/yices2

id: firewire_tree.3.prop1
query-maker: "Yices 2"
query-time: 34.021000 ms
query-class: abstract
query-category: oneshot
query-type: cti
status: sat
Benchmark
Size1777997
Compressed Size166507
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2018-07-14
Generated ByAman Goel (amangoel@umich.edu), Karem A. Sakallah (karem@umich.edu)
Generated On2018-04-06 00:00:00
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status sat
Inferred Status sat
Size 1777989
Compressed Size166516
Max. Term Depth3
Asserts 14964
Declared Functions8
Declared Constants23377
Declared Sorts 3
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

ite894 not7090 and6020 =15742
distinct4

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2018 0.14 (6/7) CVC4 master-2018-06-10-b19c840-competition-default_default sat ✅ 15.10020 15.10080
MathSAT mathsat-5.5.2-linux-x86_64-Main_default sat ✅ 0.31440 0.31542
OpenSMT opensmt2_default unknown ❌ 48.87930 47.67580
SMTInterpol SMTInterpol-2.5-19-g0d39cdee_default sat ✅ 2.02409 5.76612
veriT veriT_default sat ✅ 1.14063 1.14072
Yices2 Yices 2.6.0_default sat ✅ 0.08830 0.08821
Z3 z3-4.7.1_default sat ✅ 2.33641 2.33592
SMT-COMP 2021 MathSAT mathsat-5.6.6_default sat ✅ 0.32743 0.32736
Par4 Par4-wrapped-sq_default sat ✅ 0.09211 0.00632
SMTInterpol smtinterpol-2.5-823-g881e8631_default sat ✅ 2.80604 7.63934
veriT veriT_default sat ✅ 1.14920 1.14905
Yices2 Yices 2.6.2 bug fix_default sat ✅ 0.08772 0.08769
Yices 2.6.2 for SMTCOMP2020_default sat ✅ 0.08912 0.08904
Z3 z3-4.8.11_default sat ✅ 2.58899 2.58881
z3-4.8.8_default sat ✅ 2.83180 2.83175
SMT-COMP 2022 cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 5.49123 5.49015
MathSAT MathSAT-5.6.8_default sat ✅ 0.34519 0.34516
veriT veriT_default sat ✅ 1.21616 1.21632
Yices2 Yices 2.6.2 for SMTCOMP 2021_default sat ✅ 0.11912 0.11854
Z3 z3-4.8.17_default sat ✅ 0.79873 0.79721
z3-4.8.11_default sat ✅ 2.48456 2.48441
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 3.37477 3.37505
OpenSMT OpenSMT a78dcf01_default sat ✅ 1.83753 1.83752
SMTInterpol smtinterpol-2.5-1272-g2d6d356c_default sat ✅ 2.72794 7.90389
Yices2 Yices 2 for SMTCOMP 2023_default sat ✅ 0.09263 0.09255
Yices 2.6.2 for SMTCOMP 2021_default sat ✅ 0.08926 0.08919
SMT-COMP 2025 cvc5 cvc5 sat ✅ 2.13914 2.01743
OpenSMT OpenSMT sat ✅ 1.56676 1.44799
SMTInterpol SMTInterpol sat ✅ 2.31516 6.78298
Yices2 Yices2 sat ✅ 0.35676 0.23121