Benchmark

non-incremental/QF_UF/2018-Goel-hwbench/QF_UF_pgm_protocol.2.prop1_ab_reg_max.smt2

Generated by the tool Averroes 2 (successor of [1]) which implements safety property
verification on hardware systems.

This SMT problem belongs to a set of SMT problems generated by applying Averroes 2
to benchmarks derived from [2-5].

A total of 412 systems (345 from [2], 19 from [3], 26 from [4], 22 from [5]) were
syntactically converted from their original formats (using [6, 7]), and given to 
Averroes 2 to perform property checking with abstraction (wide bit-vectors -> terms, 
wide operators -> UF) using SMT solvers [8, 9].

[1] Lee S., Sakallah K.A. (2014) Unbounded Scalable Verification Based on Approximate
Property-Directed Reachability and Datapath Abstraction. In: Biere A., Bloem R. (eds)
Computer Aided Verification. CAV 2014. Lecture Notes in Computer Science, vol 8559.
Springer, Cham
[2] http://fmv.jku.at/aiger/index.html#beem
[3] http://www.cs.cmu.edu/~modelcheck/vcegar
[4] http://www.cprover.org/hardware/v2c
[5] http://github.com/aman-goel/verilogbench
[6] http://www.clifford.at/yosys
[7] http://github.com/chengyinwu/V3
[8] http://github.com/Z3Prover/z3
[9] http://github.com/SRI-CSL/yices2

id: pgm_protocol.2.prop1
query-maker: "Yices 2"
query-time: 27.384000 ms
query-class: abstract
query-category: oneshot
query-type: regular
status: sat
Benchmark
Size700482
Compressed Size67383
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2018-07-14
Generated ByAman Goel (amangoel@umich.edu), Karem A. Sakallah (karem@umich.edu)
Generated On2018-04-06 00:00:00
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status sat
Inferred Status sat
Size 700474
Compressed Size67393
Max. Term Depth3
Asserts 5510
Declared Functions10
Declared Constants9162
Declared Sorts 3
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

ite813 not1976 and2085 =5897
distinct2

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2018 0.14 (6/7) CVC4 master-2018-06-10-b19c840-competition-default_default sat ✅ 0.48869 0.48887
MathSAT mathsat-5.5.2-linux-x86_64-Main_default sat ✅ 0.10276 0.10380
OpenSMT opensmt2_default unknown ❌ 3.05034 3.05010
SMTInterpol SMTInterpol-2.5-19-g0d39cdee_default sat ✅ 1.38248 3.76501
veriT veriT_default sat ✅ 0.24912 0.24928
Yices2 Yices 2.6.0_default sat ✅ 0.02906 0.02897
Z3 z3-4.7.1_default sat ✅ 0.12057 0.12048
SMT-COMP 2020 0.27 (8/11) Alt-Ergo Alt-Ergo-SMTComp-2020_default unknown ❌ 83.49550 108.36000
CVC4 CVC4-sq-final_default sat ✅ 0.59476 0.59512
MathSAT MathSAT5_default.sh sat ✅ 0.11111 0.11108
OpenSMT OpenSMT_default sat ✅ 0.33312 0.33307
Par4 Par4-wrapped-sq_default sat ✅ 0.04198 0.00678
SMTInterpol smtinterpol-2.5-679-gacfde87a_default sat ✅ 1.30306 3.75905
veriT veriT_default sat ✅ 0.21674 0.21694
Yices2 Yices 2.6.2 bug fix_default sat ✅ 0.03136 0.03128
Z3 z3-4.8.8_default sat ✅ 0.11001 0.10996
SMT-COMP 2024 cvc5 cvc5 sat ✅ 0.56985 0.46921
OpenSMT OpenSMT sat ✅ 0.43005 0.33022
plat-smt plat-smt sat ✅ 0.26753 0.16746
SMTInterpol SMTInterpol sat ✅ 1.65793 4.73816
Yices2 Yices2 sat ✅ 0.25139 0.15089
Z3alpha Z3-alpha sat ✅ 0.38493 0.28500
SMT-COMP 2025 cvc5 cvc5 sat ✅ 0.53296 0.40982
OpenSMT OpenSMT sat ✅ 0.44772 0.32101
SMTInterpol SMTInterpol sat ✅ 1.51900 4.15223
Yices2 Yices2 sat ✅ 0.30147 0.17404