Benchmark

non-incremental/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.5.prop3_ab_reg_max.smt2

Generated by the tool Averroes 2 (successor of [1]) which implements safety property
verification on hardware systems.

This SMT problem belongs to a set of SMT problems generated by applying Averroes 2
to benchmarks derived from [2-5].

A total of 412 systems (345 from [2], 19 from [3], 26 from [4], 22 from [5]) were
syntactically converted from their original formats (using [6, 7]), and given to 
Averroes 2 to perform property checking with abstraction (wide bit-vectors -> terms, 
wide operators -> UF) using SMT solvers [8, 9].

[1] Lee S., Sakallah K.A. (2014) Unbounded Scalable Verification Based on Approximate
Property-Directed Reachability and Datapath Abstraction. In: Biere A., Bloem R. (eds)
Computer Aided Verification. CAV 2014. Lecture Notes in Computer Science, vol 8559.
Springer, Cham
[2] http://fmv.jku.at/aiger/index.html#beem
[3] http://www.cs.cmu.edu/~modelcheck/vcegar
[4] http://www.cprover.org/hardware/v2c
[5] http://github.com/aman-goel/verilogbench
[6] http://www.clifford.at/yosys
[7] http://github.com/chengyinwu/V3
[8] http://github.com/Z3Prover/z3
[9] http://github.com/SRI-CSL/yices2

id: firewire_tree.5.prop3
query-maker: "Yices 2"
query-time: 66.919000 ms
query-class: abstract
query-category: oneshot
query-type: regular
status: sat
Benchmark
Size4644168
Compressed Size409636
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2018-07-14
Generated ByAman Goel (amangoel@umich.edu), Karem A. Sakallah (karem@umich.edu)
Generated On2018-04-06 00:00:00
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status sat
Inferred Status sat
Size 4644160
Compressed Size409644
Max. Term Depth3
Asserts 38200
Declared Functions8
Declared Constants59573
Declared Sorts 3
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

ite2850 not17267 and15117 =40754
distinct2

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2018 0.14 (6/7) CVC4 master-2018-06-10-b19c840-competition-default_default sat ✅ 5.13096 5.13091
MathSAT mathsat-5.5.2-linux-x86_64-Main_default sat ✅ 0.92863 0.92954
OpenSMT opensmt2_default unknown ❌ 620.77000 615.00600
SMTInterpol SMTInterpol-2.5-19-g0d39cdee_default sat ✅ 3.79995 9.83995
veriT veriT_default sat ✅ 7.88713 7.88678
Yices2 Yices 2.6.0_default sat ✅ 0.50004 0.49996
Z3 z3-4.7.1_default sat ✅ 1.26484 1.26476
SMT-COMP 2020 0.27 (8/11) Alt-Ergo Alt-Ergo-SMTComp-2020_default unknown ❌ 1200.11000 2105.76000
CVC4 CVC4-sq-final_default sat ✅ 5.85059 5.85076
MathSAT MathSAT5_default.sh sat ✅ 0.99588 0.99583
OpenSMT OpenSMT_default sat ✅ 18.36580 18.36430
Par4 Par4-wrapped-sq_default sat ✅ 0.56085 1.08000
SMTInterpol smtinterpol-2.5-679-gacfde87a_default sat ✅ 4.58590 12.50440
veriT veriT_default sat ✅ 6.08111 6.08084
Yices2 Yices 2.6.2 bug fix_default sat ✅ 0.55934 0.55899
Z3 z3-4.8.8_default sat ✅ 1.39997 1.39974
SMT-COMP 2022 cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 12.67970 12.68040
MathSAT MathSAT-5.6.8_default sat ✅ 1.03634 1.03629
veriT veriT_default sat ✅ 7.53033 7.53017
Yices2 Yices 2.6.2 for SMTCOMP 2021_default sat ✅ 0.56043 0.56039
Z3 z3-4.8.17_default sat ✅ 1.79705 1.79889
z3-4.8.11_default sat ✅ 1.34601 1.34591
SMT-COMP 2023 cvc5 cvc5-default-2023-05-16-ea045f305_sq sat ✅ 6.90636 6.90059
OpenSMT OpenSMT a78dcf01_default sat ✅ 5.65444 5.65377
SMTInterpol smtinterpol-2.5-1272-g2d6d356c_default sat ✅ 5.10054 13.28120
Yices2 Yices 2 for SMTCOMP 2023_default sat ✅ 0.37328 0.37323
Yices 2.6.2 for SMTCOMP 2021_default sat ✅ 0.36134 0.36128
SMT-COMP 2025 cvc5 cvc5 sat ✅ 4.24749 4.10486
OpenSMT OpenSMT sat ✅ 6.88785 6.76119
SMTInterpol SMTInterpol sat ✅ 4.11297 11.74276
Yices2 Yices2 sat ✅ 0.62331 0.49597