Benchmark

non-incremental/QF_UF/2018-Goel-hwbench/QF_UF_resistance.2.prop3_ab_cti_max.smt2

Generated by the tool Averroes 2 (successor of [1]) which implements safety property
verification on hardware systems.

This SMT problem belongs to a set of SMT problems generated by applying Averroes 2
to benchmarks derived from [2-5].

A total of 412 systems (345 from [2], 19 from [3], 26 from [4], 22 from [5]) were
syntactically converted from their original formats (using [6, 7]), and given to 
Averroes 2 to perform property checking with abstraction (wide bit-vectors -> terms, 
wide operators -> UF) using SMT solvers [8, 9].

[1] Lee S., Sakallah K.A. (2014) Unbounded Scalable Verification Based on Approximate
Property-Directed Reachability and Datapath Abstraction. In: Biere A., Bloem R. (eds)
Computer Aided Verification. CAV 2014. Lecture Notes in Computer Science, vol 8559.
Springer, Cham
[2] http://fmv.jku.at/aiger/index.html#beem
[3] http://www.cs.cmu.edu/~modelcheck/vcegar
[4] http://www.cprover.org/hardware/v2c
[5] http://github.com/aman-goel/verilogbench
[6] http://www.clifford.at/yosys
[7] http://github.com/chengyinwu/V3
[8] http://github.com/Z3Prover/z3
[9] http://github.com/SRI-CSL/yices2

id: resistance.2.prop3
query-maker: "Yices 2"
query-time: 2.724000 ms
query-class: abstract
query-category: oneshot
query-type: cti
status: unsat
Benchmark
Size115958
Compressed Size13435
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2018-07-14
Generated ByAman Goel (amangoel@umich.edu), Karem A. Sakallah (karem@umich.edu)
Generated On2018-04-06 00:00:00
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unsat
Inferred Status unsat
Size 115950
Compressed Size13497
Max. Term Depth3
Asserts 1034
Declared Functions8
Declared Constants1594
Declared Sorts 2
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

ite25 not538 and391 =1067
distinct4

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2018 0.14 (6/7) CVC4 master-2018-06-10-b19c840-competition-default_default unsat ✅ 0.13216 0.13229
MathSAT mathsat-5.5.2-linux-x86_64-Main_default unsat ✅ 0.03311 0.03392
OpenSMT opensmt2_default unknown ❌ 0.19442 0.19432
SMTInterpol SMTInterpol-2.5-19-g0d39cdee_default unsat ✅ 0.57979 1.40965
veriT veriT_default unsat ✅ 0.02553 0.02561
Yices2 Yices 2.6.0_default unsat ✅ 0.01185 0.00993
Z3 z3-4.7.1_default unsat ✅ 0.05671 0.05661
SMT-COMP 2019 Alt-Ergo Alt-Ergo-SMTComp-2019-wrapped-sq_default unsat ✅ 0.33040 0.32253
CVC4 CVC4-2019-06-03-d350fe1-wrapped-sq_default unsat ✅ 0.13378 0.13405
OpenSMT OpenSMT-wrapped-sq_default unsat ✅ 0.06237 0.06235
Par4 Par4-wrapped-sq_default unsat ✅ 0.01709 0.00607
SMTInterpol smtinterpol-2.5-514-wrapped-sq_default unsat ✅ 0.57216 1.43323
veriT veriT-wrapped-sq_default unsat ✅ 0.02964 0.02991
Yices2 Yices 2.6.0_default unsat ✅ 0.01096 0.01090
Yices 2.6.2-wrapped-sq_default unsat ✅ 0.00976 0.00974
Z3 z3-4.8.4-d6df51951f4c-wrapped-sq_default unsat ✅ 0.05941 0.05877
SMT-COMP 2025 cvc5 cvc5 unsat ✅ 0.33261 0.20394
OpenSMT OpenSMT unsat ✅ 0.26248 0.14745
SMTInterpol SMTInterpol unsat ✅ 0.82517 1.87160
Yices2 Yices2 unsat ✅ 0.26719 0.13914