Benchmark
non-incremental/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.3.prop3_ab_cti_max.smt2
Generated by the tool Averroes 2 (successor of [1]) which implements safety property
verification on hardware systems.
This SMT problem belongs to a set of SMT problems generated by applying Averroes 2
to benchmarks derived from [2-5].
A total of 412 systems (345 from [2], 19 from [3], 26 from [4], 22 from [5]) were
syntactically converted from their original formats (using [6, 7]), and given to
Averroes 2 to perform property checking with abstraction (wide bit-vectors -> terms,
wide operators -> UF) using SMT solvers [8, 9].
[1] Lee S., Sakallah K.A. (2014) Unbounded Scalable Verification Based on Approximate
Property-Directed Reachability and Datapath Abstraction. In: Biere A., Bloem R. (eds)
Computer Aided Verification. CAV 2014. Lecture Notes in Computer Science, vol 8559.
Springer, Cham
[2] http://fmv.jku.at/aiger/index.html#beem
[3] http://www.cs.cmu.edu/~modelcheck/vcegar
[4] http://www.cprover.org/hardware/v2c
[5] http://github.com/aman-goel/verilogbench
[6] http://www.clifford.at/yosys
[7] http://github.com/chengyinwu/V3
[8] http://github.com/Z3Prover/z3
[9] http://github.com/SRI-CSL/yices2
id: firewire_tree.3.prop3
query-maker: "Yices 2"
query-time: 35.007000 ms
query-class: abstract
query-category: oneshot
query-type: cti
status: sat
| Benchmark |
|---|
| Size | 1784437 |
| Compressed Size | 168414 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2018-07-14 |
| Generated By | Aman Goel (amangoel@umich.edu), Karem A. Sakallah (karem@umich.edu) |
| Generated On | 2018-04-06 00:00:00 |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | sat |
| Size | 1784429 |
| Compressed Size | 168422 |
| Max. Term Depth | 3 |
| Asserts | 15030 |
| Declared Functions | 8 |
| Declared Constants | 23456 |
| Declared Sorts | 3 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
ite | 894 |
not | 7117 |
and | 6035 |
= | 15835 |
distinct | 4 |
| | | | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2018
|
0.14 (6/7) |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
sat ✅
|
15.32740
|
15.32540
|
| |
MathSAT |
mathsat-5.5.2-linux-x86_64-Main_default |
sat ✅
|
0.31537
|
0.31640
|
| |
OpenSMT |
opensmt2_default |
unknown ❌
|
47.08320
|
46.08100
|
| |
SMTInterpol |
SMTInterpol-2.5-19-g0d39cdee_default |
sat ✅
|
2.22896
|
5.83742
|
| |
veriT |
veriT_default |
sat ✅
|
1.16155
|
1.16161
|
| |
Yices2 |
Yices 2.6.0_default |
sat ✅
|
0.10860
|
0.10853
|
| |
Z3 |
z3-4.7.1_default |
sat ✅
|
2.43733
|
2.43689
|
|
SMT-COMP 2020
|
0.27 (8/11) |
Alt-Ergo |
Alt-Ergo-SMTComp-2020_default |
unknown ❌
|
71.45850
|
146.30600
|
| |
CVC4 |
CVC4-sq-final_default |
sat ✅
|
15.19980
|
15.19970
|
| |
MathSAT |
MathSAT5_default.sh |
sat ✅
|
0.33484
|
0.33476
|
| |
OpenSMT |
OpenSMT_default |
sat ✅
|
3.33604
|
3.33606
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
0.17885
|
0.01193
|
| |
SMTInterpol |
smtinterpol-2.5-679-gacfde87a_default |
sat ✅
|
2.31259
|
6.67972
|
| |
veriT |
veriT_default |
sat ✅
|
0.96383
|
0.96377
|
| |
Yices2 |
Yices 2.6.2 bug fix_default |
sat ✅
|
0.11402
|
0.11395
|
| |
Z3 |
z3-4.8.8_default |
sat ✅
|
2.74638
|
2.74640
|
|
SMT-COMP 2022
|
|
cvc5 |
cvc5-default-2022-07-02-b15e116-wrapped_sq |
sat ✅
|
5.39430
|
5.39363
|
| |
MathSAT |
MathSAT-5.6.8_default |
sat ✅
|
0.34198
|
0.34187
|
| |
veriT |
veriT_default |
sat ✅
|
1.16138
|
1.16145
|
| |
Yices2 |
Yices 2.6.2 for SMTCOMP 2021_default |
sat ✅
|
0.11531
|
0.11527
|
| |
Z3 |
z3-4.8.17_default |
sat ✅
|
0.75433
|
0.75616
|
| |
|
z3-4.8.11_default |
sat ✅
|
2.58168
|
2.58102
|