Benchmark

non-incremental/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.2.prop1_ab_cti_max.smt2

Generated by the tool Averroes 2 (successor of [1]) which implements safety property
verification on hardware systems.

This SMT problem belongs to a set of SMT problems generated by applying Averroes 2
to benchmarks derived from [2-5].

A total of 412 systems (345 from [2], 19 from [3], 26 from [4], 22 from [5]) were
syntactically converted from their original formats (using [6, 7]), and given to 
Averroes 2 to perform property checking with abstraction (wide bit-vectors -> terms, 
wide operators -> UF) using SMT solvers [8, 9].

[1] Lee S., Sakallah K.A. (2014) Unbounded Scalable Verification Based on Approximate
Property-Directed Reachability and Datapath Abstraction. In: Biere A., Bloem R. (eds)
Computer Aided Verification. CAV 2014. Lecture Notes in Computer Science, vol 8559.
Springer, Cham
[2] http://fmv.jku.at/aiger/index.html#beem
[3] http://www.cs.cmu.edu/~modelcheck/vcegar
[4] http://www.cprover.org/hardware/v2c
[5] http://github.com/aman-goel/verilogbench
[6] http://www.clifford.at/yosys
[7] http://github.com/chengyinwu/V3
[8] http://github.com/Z3Prover/z3
[9] http://github.com/SRI-CSL/yices2

id: firewire_tree.2.prop1
query-maker: "Yices 2"
query-time: 13.213000 ms
query-class: abstract
query-category: oneshot
query-type: cti
status: sat
Benchmark
Size871330
Compressed Size84076
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2018-07-14
Generated ByAman Goel (amangoel@umich.edu), Karem A. Sakallah (karem@umich.edu)
Generated On2018-04-06 00:00:00
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status sat
Inferred Status sat
Size 871322
Compressed Size84086
Max. Term Depth3
Asserts 7468
Declared Functions8
Declared Constants11615
Declared Sorts 3
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

ite372 not3638 and2998 =7828
distinct4

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2018 0.14 (6/7) CVC4 master-2018-06-10-b19c840-competition-default_default sat ✅ 3.79326 3.79306
MathSAT mathsat-5.5.2-linux-x86_64-Main_default sat ✅ 0.14785 0.14902
OpenSMT opensmt2_default unknown ❌ 8.53814 8.53756
SMTInterpol SMTInterpol-2.5-19-g0d39cdee_default sat ✅ 1.43061 3.88834
veriT veriT_default sat ✅ 0.32329 0.32344
Yices2 Yices 2.6.0_default sat ✅ 0.04397 0.04387
Z3 z3-4.7.1_default sat ✅ 0.51477 0.51470
SMT-COMP 2019 0.12 (7/8) Alt-Ergo Alt-Ergo-SMTComp-2019-wrapped-sq_default unknown ❌ 963.17500 1009.55000
CVC4 CVC4-2019-06-03-d350fe1-wrapped-sq_default sat ✅ 3.78349 3.78391
OpenSMT OpenSMT-wrapped-sq_default sat ✅ 1.04193 1.04180
Par4 Par4-wrapped-sq_default sat ✅ 0.05271 0.00749
SMTInterpol smtinterpol-2.5-514-wrapped-sq_default sat ✅ 1.39865 4.07770
veriT veriT-wrapped-sq_default sat ✅ 0.33274 0.33301
Yices2 Yices 2.6.0_default sat ✅ 0.04547 0.04544
Yices 2.6.2-wrapped-sq_default sat ✅ 0.04418 0.04417
Z3 z3-4.8.4-d6df51951f4c-wrapped-sq_default sat ✅ 0.56790 0.56791
SMT-COMP 2020 0.27 (8/11) Alt-Ergo Alt-Ergo-SMTComp-2020_default unknown ❌ 14.72670 40.48230
CVC4 CVC4-sq-final_default sat ✅ 3.78159 3.78165
MathSAT MathSAT5_default.sh sat ✅ 0.15706 0.15703
OpenSMT OpenSMT_default sat ✅ 0.48196 0.48185
Par4 Par4-wrapped-sq_default sat ✅ 0.05182 0.00609
SMTInterpol smtinterpol-2.5-679-gacfde87a_default sat ✅ 1.55066 4.39343
veriT veriT_default sat ✅ 0.28099 0.28122
Yices2 Yices 2.6.2 bug fix_default sat ✅ 0.04442 0.04433
Z3 z3-4.8.8_default sat ✅ 0.60225 0.60225
SMT-COMP 2021 MathSAT mathsat-5.6.6_default sat ✅ 0.15765 0.15759
Par4 Par4-wrapped-sq_default sat ✅ 0.04730 0.00653
SMTInterpol smtinterpol-2.5-823-g881e8631_default sat ✅ 2.07045 6.19479
veriT veriT_default sat ✅ 0.32755 0.32781
Yices2 Yices 2.6.2 bug fix_default sat ✅ 0.03903 0.03898
Yices 2.6.2 for SMTCOMP2020_default sat ✅ 0.03973 0.03967
Z3 z3-4.8.11_default sat ✅ 0.55351 0.55329
z3-4.8.8_default sat ✅ 0.59588 0.59585