Benchmark
non-incremental/QF_UF/2018-Goel-hwbench/QF_UF_h_Rrobin_ab_reg_max.smt2
Generated by the tool Averroes 2 (successor of [1]) which implements safety property
verification on hardware systems.
This SMT problem belongs to a set of SMT problems generated by applying Averroes 2
to benchmarks derived from [2-5].
A total of 412 systems (345 from [2], 19 from [3], 26 from [4], 22 from [5]) were
syntactically converted from their original formats (using [6, 7]), and given to
Averroes 2 to perform property checking with abstraction (wide bit-vectors -> terms,
wide operators -> UF) using SMT solvers [8, 9].
[1] Lee S., Sakallah K.A. (2014) Unbounded Scalable Verification Based on Approximate
Property-Directed Reachability and Datapath Abstraction. In: Biere A., Bloem R. (eds)
Computer Aided Verification. CAV 2014. Lecture Notes in Computer Science, vol 8559.
Springer, Cham
[2] http://fmv.jku.at/aiger/index.html#beem
[3] http://www.cs.cmu.edu/~modelcheck/vcegar
[4] http://www.cprover.org/hardware/v2c
[5] http://github.com/aman-goel/verilogbench
[6] http://www.clifford.at/yosys
[7] http://github.com/chengyinwu/V3
[8] http://github.com/Z3Prover/z3
[9] http://github.com/SRI-CSL/yices2
id: h_Rrobin
query-maker: "Yices 2"
query-time: 0.001000 ms
query-class: abstract
query-category: oneshot
query-type: regular
status: unsat
| Benchmark |
|---|
| Size | 3395 |
| Compressed Size | 1311 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2018-07-14 |
| Generated By | Aman Goel (amangoel@umich.edu), Karem A. Sakallah (karem@umich.edu) |
| Generated On | 2018-04-06 00:00:00 |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unsat |
| Inferred Status | unsat |
| Size | 3387 |
| Compressed Size | 1339 |
| Max. Term Depth | 3 |
| Asserts | 20 |
| Declared Functions | 1 |
| Declared Constants | 31 |
| Declared Sorts | 2 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2018
|
0.29 (5/7) |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unsat ✅
|
0.01033
|
0.01047
|
| |
MathSAT |
mathsat-5.5.2-linux-x86_64-Main_default |
unknown ❌
|
0.01441
|
0.01536
|
| |
OpenSMT |
opensmt2_default |
unknown ❌
|
0.04296
|
0.04290
|
| |
SMTInterpol |
SMTInterpol-2.5-19-g0d39cdee_default |
unsat ✅
|
0.24934
|
0.34518
|
| |
veriT |
veriT_default |
unsat ✅
|
0.00763
|
0.00773
|
| |
Yices2 |
Yices 2.6.0_default |
unsat ✅
|
0.01127
|
0.00593
|
| |
Z3 |
z3-4.7.1_default |
unsat ✅
|
0.03310
|
0.03303
|
|
SMT-COMP 2019
|
|
Alt-Ergo |
Alt-Ergo-SMTComp-2019-wrapped-sq_default |
unsat ✅
|
0.03072
|
0.03278
|
| |
CVC4 |
CVC4-2019-06-03-d350fe1-wrapped-sq_default |
unsat ✅
|
0.01497
|
0.01522
|
| |
OpenSMT |
OpenSMT-wrapped-sq_default |
unsat ✅
|
0.01175
|
0.01175
|
| |
Par4 |
Par4-wrapped-sq_default |
unsat ✅
|
0.01270
|
0.00586
|
| |
SMTInterpol |
smtinterpol-2.5-514-wrapped-sq_default |
unsat ✅
|
0.29083
|
0.38153
|
| |
veriT |
veriT-wrapped-sq_default |
unsat ✅
|
0.01114
|
0.01143
|
| |
Yices2 |
Yices 2.6.0_default |
unsat ✅
|
0.01156
|
0.00618
|
| |
|
Yices 2.6.2-wrapped-sq_default |
unsat ✅
|
0.00961
|
0.00588
|
| |
Z3 |
z3-4.8.4-d6df51951f4c-wrapped-sq_default |
unsat ✅
|
0.03491
|
0.03491
|
|
SMT-COMP 2024
|
|
cvc5 |
cvc5 |
unsat ✅
|
0.24801
|
0.14779
|
| |
OpenSMT |
OpenSMT |
unsat ✅
|
0.22495
|
0.12527
|
| |
plat-smt |
plat-smt |
unsat ✅
|
0.21217
|
0.11291
|
| |
SMTInterpol |
SMTInterpol |
unsat ✅
|
0.43232
|
0.47883
|
| |
Yices2 |
Yices2 |
unsat ✅
|
0.26017
|
0.15728
|
| |
Z3alpha |
Z3-alpha |
unsat ✅
|
0.28732
|
0.18759
|