Benchmark

non-incremental/QF_UF/2018-Goel-hwbench/QF_UF_firewire_tree.1.prop1_ab_cti_max.smt2

Generated by the tool Averroes 2 (successor of [1]) which implements safety property
verification on hardware systems.

This SMT problem belongs to a set of SMT problems generated by applying Averroes 2
to benchmarks derived from [2-5].

A total of 412 systems (345 from [2], 19 from [3], 26 from [4], 22 from [5]) were
syntactically converted from their original formats (using [6, 7]), and given to 
Averroes 2 to perform property checking with abstraction (wide bit-vectors -> terms, 
wide operators -> UF) using SMT solvers [8, 9].

[1] Lee S., Sakallah K.A. (2014) Unbounded Scalable Verification Based on Approximate
Property-Directed Reachability and Datapath Abstraction. In: Biere A., Bloem R. (eds)
Computer Aided Verification. CAV 2014. Lecture Notes in Computer Science, vol 8559.
Springer, Cham
[2] http://fmv.jku.at/aiger/index.html#beem
[3] http://www.cs.cmu.edu/~modelcheck/vcegar
[4] http://www.cprover.org/hardware/v2c
[5] http://github.com/aman-goel/verilogbench
[6] http://www.clifford.at/yosys
[7] http://github.com/chengyinwu/V3
[8] http://github.com/Z3Prover/z3
[9] http://github.com/SRI-CSL/yices2

id: firewire_tree.1.prop1
query-maker: "Yices 2"
query-time: 28.993000 ms
query-class: abstract
query-category: oneshot
query-type: cti
status: sat
Benchmark
Size1778858
Compressed Size165790
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2018-07-14
Generated ByAman Goel (amangoel@umich.edu), Karem A. Sakallah (karem@umich.edu)
Generated On2018-04-06 00:00:00
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status sat
Inferred Status sat
Size 1778850
Compressed Size165800
Max. Term Depth3
Asserts 14968
Declared Functions8
Declared Constants23385
Declared Sorts 3
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

ite894 not7090 and6020 =15746
distinct4

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2018 0.14 (6/7) CVC4 master-2018-06-10-b19c840-competition-default_default sat ✅ 16.24890 16.24840
MathSAT mathsat-5.5.2-linux-x86_64-Main_default sat ✅ 0.31148 0.31246
OpenSMT opensmt2_default unknown ❌ 47.12340 46.64480
SMTInterpol SMTInterpol-2.5-19-g0d39cdee_default sat ✅ 2.04224 5.83679
veriT veriT_default sat ✅ 1.12859 1.12873
Yices2 Yices 2.6.0_default sat ✅ 0.11118 0.11113
Z3 z3-4.7.1_default sat ✅ 2.39464 2.39414
SMT-COMP 2019 0.12 (7/8) Alt-Ergo Alt-Ergo-SMTComp-2019-wrapped-sq_default unknown ❌ 2400.12000 2607.85000
CVC4 CVC4-2019-06-03-d350fe1-wrapped-sq_default sat ✅ 16.44090 16.43980
OpenSMT OpenSMT-wrapped-sq_default sat ✅ 6.48321 6.48310
Par4 Par4-wrapped-sq_default sat ✅ 0.11904 0.00604
SMTInterpol smtinterpol-2.5-514-wrapped-sq_default sat ✅ 2.07745 5.83817
veriT veriT-wrapped-sq_default sat ✅ 1.14282 1.14300
Yices2 Yices 2.6.0_default sat ✅ 0.11359 0.11355
Yices 2.6.2-wrapped-sq_default sat ✅ 0.11240 0.11241
Z3 z3-4.8.4-d6df51951f4c-wrapped-sq_default sat ✅ 2.50328 2.50314
SMT-COMP 2022 cvc5 cvc5-default-2022-07-02-b15e116-wrapped_sq sat ✅ 5.33457 5.33456
MathSAT MathSAT-5.6.8_default sat ✅ 0.33523 0.33516
veriT veriT_default sat ✅ 1.14633 1.14659
Yices2 Yices 2.6.2 for SMTCOMP 2021_default sat ✅ 0.09196 0.09188
Z3 z3-4.8.17_default sat ✅ 0.79005 0.79190
z3-4.8.11_default sat ✅ 2.54833 2.54792
SMT-COMP 2024 cvc5 cvc5 sat ✅ 2.64281 2.54202
OpenSMT OpenSMT sat ✅ 1.67076 1.57082
plat-smt plat-smt sat ✅ 0.33977 0.23920
SMTInterpol SMTInterpol sat ✅ 2.86962 8.82749
Yices2 Yices2 sat ✅ 0.28107 0.18083
Z3alpha Z3-alpha sat ✅ 0.97334 0.87233