Benchmark
non-incremental/BV/20190429-UltimateAutomizerSvcomp2019/jain_7_true-unreach-call_true-no-overflow_false-termination.i_19.smt2
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Generated by the tool Ultimate Automizer [1,2] which implements
an automata theoretic approach [3] to software verification.
This SMT script belongs to a set of SMT scripts that was generated by
applying Ultimate Automizer to benchmarks [4] from the SV-COMP 2019 [5,6].
This script might _not_ contain all SMT commands that are used by
Ultimate Automizer. In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.
2019-04-27, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)
[1] https://ultimate.informatik.uni-freiburg.de/automizer/
[2] Matthias Heizmann, Yu-Fang Chen, Daniel Dietsch, Marius Greitschus,
Jochen Hoenicke, Yong Li, Alexander Nutz, Betim Musa, Christian
Schilling, Tanja Schindler, Andreas Podelski: Ultimate Automizer
and the Search for Perfect Interpolants - (Competition Contribution).
TACAS (2) 2018: 447-451
[3] Matthias Heizmann, Jochen Hoenicke, Andreas Podelski: Software Model
Checking for People Who Love Automata. CAV 2013:36-52
[4] https://github.com/sosy-lab/sv-benchmarks
[5] Dirk Beyer: Automatic Verification of C and Java Programs: SV-COMP 2019.
TACAS (3) 2019: 133-155
[6] https://sv-comp.sosy-lab.org/2019/
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| Benchmark |
|---|
| Size | 3662 |
| Compressed Size | 1217 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2020-07-06 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unsat |
| Inferred Status | unsat |
| Size | 3654 |
| Compressed Size | 1217 |
| Max. Term Depth | 11 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 3 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 2 |
or | 1 |
= | 3 |
forall | 1 |
exists | 1 |
BitVec | 18 |
bvneg | 5 |
bvadd | 7 |
bvmul | 24 |
| | | | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
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SMT-COMP 2024
|
0.60 (2/5) |
Bitwuzla |
Bitwuzla |
unknown ❌
|
1201.22231
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1201.07226
|
| |
cvc5 |
cvc5 |
unsat ✅
|
0.26766
|
0.16732
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.57266
|
0.89313
|
| |
YicesQS |
YicesQS |
unsat ✅
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0.23073
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0.13089
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
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6.32852
|
6.22824
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