Benchmark
non-incremental/BV/2018-Preiner-cav18/check_bvsgt_bvmul_64bit.smt2
Publication:
[1] Solving Quantified Bit-Vectors using Invertibility Conditions
Aina Niemetz, Mathias Preiner, Andrew Reynolds, Clark Barrett and Cesare Tinelli
To appear in CAV 2018
| Benchmark |
|---|
| Size | 1289 |
| Compressed Size | 607 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | crafted |
| First Occurrence | 2018-07-14 |
| Generated By | Mathias Preiner |
| Generated On | 2018-04-06 00:00:00 |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unknown |
| Inferred Status | unsat |
| Size | 1281 |
| Compressed Size | 592 |
| Max. Term Depth | 7 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 2 |
| Declared Sorts | 0 |
| Defined Functions | 3 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 2 |
| Declared Datatypes | 0 |
Symbols
Bool | 1 |
ite | 2 |
not | 1 |
and | 1 |
=> | 2 |
= | 2 |
exists | 2 |
BitVec | 6 |
bvnot | 4 |
bvor | 2 |
bvneg | 1 |
bvmul | 2 |
bvudiv | 1 |
bvurem | 1 |
bvsub | 1 |
bvslt | 1 |
bvsgt | 2 |
bvlshr | 1 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2018
|
0.75 (1/4) |
Boolector |
Boolector_default |
unknown ❌
|
1200.11000
|
2400.15000
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.02000
|
1189.96000
|
| |
Q3B |
Q3B_default |
unsat ✅
|
0.17519
|
0.44940
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.02000
|
1200.03000
|
|
SMT-COMP 2021
|
1.00 (0/4) |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.11000
|
4736.69000
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.6_default |
unknown ❌
|
3.84029
|
5.02715
|
| |
YicesQS |
yices-QS-2021-06-13under10_default |
unknown ❌
|
1200.03000
|
1199.82000
|
| |
Z3 |
z3-4.8.11_default |
unknown ❌
|
1200.02000
|
1199.63000
|
|
SMT-COMP 2022
|
0.75 (2/8) |
Bitwuzla |
Bitwuzla-wrapped_default |
unknown ❌
|
1200.03000
|
1199.86000
|
| |
cvc5 |
cvc5-default-2022-07-02-b15e116-wrapped_sq |
unknown ❌
|
1200.08000
|
1160.08000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.11000
|
4740.00000
|
| |
Q3B |
Q3B_default |
unsat ✅
|
0.10811
|
0.23073
|
| |
Q3B-pBNN |
Q3B-pBDD SMT-COMP 2022 final_default |
unsat ✅
|
0.08704
|
0.16942
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.7-wrapped_default |
unknown ❌
|
3.37079
|
5.20042
|
| |
YicesQS |
yicesQS-2022-07-02-optim-under10_default |
unknown ❌
|
1200.02000
|
1199.72000
|
| |
Z3 |
z3-4.8.17_default |
unknown ❌
|
1200.02000
|
1199.83000
|
|
SMT-COMP 2024
|
0.80 (1/5) |
Bitwuzla |
Bitwuzla |
unknown ❌
|
1201.35050
|
1200.65533
|
| |
cvc5 |
cvc5 |
unknown ❌
|
1201.72227
|
1200.48600
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
34.74816
|
54.69201
|
| |
YicesQS |
YicesQS |
unsat ✅
|
0.43949
|
0.30785
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.74804
|
1201.34171
|
|
SMT-COMP 2025
|
0.80 (1/5) |
Bitwuzla |
Bitwuzla |
unknown ❌
|
1201.29416
|
1200.94433
|
| |
cvc5 |
cvc5 |
unknown ❌
|
1201.74332
|
1201.01415
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
1201.50359
|
1260.67802
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT |
unknown ❌
|
2.20559
|
4.40221
|
| |
YicesQS |
YicesQS |
unsat ✅
|
0.34827
|
0.22752
|