Benchmark
non-incremental/BV/20170501-Heizmann-UltimateAutomizer/sum02_false-unreach-call_true-no-overflow.i_336.smt2
Generated by the tool Ultimate Automizer [1,2] which implements
an automata theoretic approach [3] to software verification.
This SMT script belongs to a set of SMT scripts that was generated by
applying Ultimate Automizer to benchmarks [4] from the SV-COMP 2017 [5,6].
This script might _not_ contain all SMT commands that are used by
Ultimate Automizer. In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.
2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)
[1] https://ultimate.informatik.uni-freiburg.de/automizer/
[2] Matthias Heizmann, Yu-Wen Chen, Daniel Dietsch, Marius Greitschus,
Alexander Nutz, Betim Musa, Claus Schätzle, Christian Schilling,
Frank Schüssele, Andreas Podelski:
Ultimate Automizer with an On-Demand Construction of Floyd-Hoare
Automata - (Competition Contribution). TACAS (2) 2017: 394-398
[3] Matthias Heizmann, Jochen Hoenicke, Andreas Podelski: Software Model
Checking for People Who Love Automata. CAV 2013:36-52
[4] https://github.com/sosy-lab/sv-benchmarks
[5] Dirk Beyer: Software Verification with Validation of Results -
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[6] https://sv-comp.sosy-lab.org/2017/
| Benchmark |
|---|
| Size | 3132 |
| Compressed Size | 1156 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | industrial |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | sat |
| Size | 3124 |
| Compressed Size | 1152 |
| Max. Term Depth | 8 |
| Asserts | 5 |
| Declared Functions | 0 |
| Declared Constants | 3 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 5 |
or | 6 |
= | 8 |
forall | 3 |
BitVec | 3 |
bvadd | 15 |
bvmul | 6 |
bvudiv | 4 |
bvule | 6 |
| | | | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
0.25 (3/4) |
Boolector |
Boolector SMT17 final boolector |
sat ✅
|
1.19757
|
1.83313
|
| |
CVC4 |
CVC4-smtcomp2017-main default |
sat ✅
|
0.09181
|
0.09105
|
| |
Q3B |
Q3B default |
unknown ❌
|
600.01800
|
1799.53000
|
| |
Z3 |
z3-4.5.0 default |
sat ✅
|
0.19725
|
0.19563
|
|
SMT-COMP 2018
|
0.25 (3/4) |
Boolector |
Boolector_default |
sat ✅
|
0.64492
|
1.22453
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.02000
|
1159.75000
|
| |
Q3B |
Q3B_default |
sat ✅
|
1146.36000
|
3437.61000
|
| |
Z3 |
z3-4.7.1_default |
sat ✅
|
0.22729
|
0.22709
|
|
SMT-COMP 2021
|
0.50 (2/4) |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
0.27350
|
0.00639
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.6_default |
unknown ❌
|
2.87011
|
4.88850
|
| |
YicesQS |
yices-QS-2021-06-13under10_default |
unknown ❌
|
1200.03000
|
1199.81000
|
| |
Z3 |
z3-4.8.11_default |
sat ✅
|
0.26914
|
0.26906
|
|
SMT-COMP 2024
|
0.20 (4/5) |
Bitwuzla |
Bitwuzla |
sat ✅
|
0.28922
|
0.18896
|
| |
cvc5 |
cvc5 |
sat ✅
|
240.33129
|
240.12417
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.61476
|
1.02645
|
| |
YicesQS |
YicesQS |
sat ✅
|
0.23898
|
0.13880
|
| |
Z3alpha |
Z3-alpha |
sat ✅
|
0.43766
|
0.33101
|
|
SMT-COMP 2025
|
0.40 (3/5) |
Bitwuzla |
Bitwuzla |
sat ✅
|
0.29153
|
0.17183
|
| |
cvc5 |
cvc5 |
sat ✅
|
80.31611
|
80.18478
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
0.53130
|
0.63325
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT |
unknown ❌
|
1.98523
|
4.22718
|
| |
YicesQS |
YicesQS |
sat ✅
|
0.42083
|
0.30176
|