Benchmark

non-incremental/BV/20170501-Heizmann-UltimateAutomizer/sum02_true-unreach-call_true-no-overflow.i_415.smt2

Generated by the tool Ultimate Automizer [1,2] which implements 
an automata theoretic approach [3] to software verification.

This SMT script belongs to a set of SMT scripts that was generated by 
applying Ultimate Automizer to benchmarks [4] from the SV-COMP 2017 [5,6].

This script might _not_ contain all SMT commands that are used by 
Ultimate Automizer. In order to satisfy the restrictions of
the SMT-COMP we have to drop e.g., the commands for getting
values (resp. models), unsatisfiable cores and interpolants.

2017-05-01, Matthias Heizmann (heizmann@informatik.uni-freiburg.de)


[1] https://ultimate.informatik.uni-freiburg.de/automizer/
[2] Matthias Heizmann, Yu-Wen Chen, Daniel Dietsch, Marius Greitschus, 
Alexander Nutz, Betim Musa, Claus Schätzle, Christian Schilling, 
Frank Schüssele, Andreas Podelski:
Ultimate Automizer with an On-Demand Construction of Floyd-Hoare 
Automata - (Competition Contribution). TACAS (2) 2017: 394-398
[3] Matthias Heizmann, Jochen Hoenicke, Andreas Podelski: Software Model 
Checking for People Who Love Automata. CAV 2013:36-52
[4] https://github.com/sosy-lab/sv-benchmarks
[5] Dirk Beyer: Software Verification with Validation of Results - 
(Report on SV-COMP 2017). TACAS (2) 2017: 331-349
[6] https://sv-comp.sosy-lab.org/2017/
Benchmark
Size3256
Compressed Size1183
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2017-07-23
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unsat
Inferred Status unsat
Size 3248
Compressed Size1184
Max. Term Depth9
Asserts 3
Declared Functions0
Declared Constants5
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

not4 or6 and2 =10
forall3 BitVec3 bvadd16 bvmul4
bvudiv4 bvule7 zero_extend13 sign_extend3

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2017 0.75 (1/4) Boolector Boolector SMT17 final boolector unknown ❌ 600.02100 1199.83000
CVC4 CVC4-smtcomp2017-main default unknown ❌ 600.02600 599.18000
Q3B Q3B default unknown ❌ 600.06100 1799.55000
Z3 z3-4.5.0 default unsat ✅ 10.28050 10.27660
SMT-COMP 2018 1.00 (0/4) Boolector Boolector_default unknown ❌ 1200.02000 2399.75000
CVC4 master-2018-06-10-b19c840-competition-default_default unknown ❌ 1200.11000 1164.04000
Q3B Q3B_default unknown ❌ 1200.06000 3598.66000
Z3 z3-4.7.1_default unknown ❌ 1200.02000 1200.01000
SMT-COMP 2024 0.40 (3/5) Bitwuzla Bitwuzla unsat ✅ 0.26724 0.16729
cvc5 cvc5 unsat ✅ 0.81176 0.71221
SMTInterpol SMTInterpol unknown ❌ 0.65518 1.15846
YicesQS YicesQS unknown ❌ 1201.74360 1200.70316
Z3alpha Z3-alpha unsat ✅ 0.53139 0.43199
SMT-COMP 2025 0.60 (2/5) Bitwuzla Bitwuzla unsat ✅ 0.35243 0.23201
cvc5 cvc5 unsat ✅ 1.05608 0.92578
SMTInterpol SMTInterpol unknown ❌ 0.52620 0.72432
UltimateEliminator UltimateEliminator+MathSAT unknown ❌ 2.39941 4.79007
YicesQS YicesQS unknown ❌ 1201.78817 1200.95474