Benchmark
non-incremental/BV/2017-Preiner-scholl-smt08/RNDPRE/RNDPRE_3_34.smt2
Scholl, Christoph; Disch, Stefan; Pigorsch, Florian and Kupferschmid,
Stefan; Using an SMT Solver and Craig Interpolation to Detect and Remove
Redundant Linear Constraints in Representations of Non-Convex Polyhedra.
Proceedings of 6th International Workshop on Satisfiability Modulo
Theories, Princeton, USA, July 2008.
<http://abs.informatik.uni-freiburg.de/smtbench/>
Translated to BV by Mathias Preiner.
| Benchmark |
| Size | 6931 |
| Compressed Size | 1751 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | random |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | sat |
| Size | 6923 |
| Compressed Size | 1751 |
| Max. Term Depth | 17 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 3 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 10 |
or | 30 |
and | 30 |
= | 23 |
forall | 1 |
exists | 2 |
let | 1 |
BitVec | 3 |
bvneg | 88 |
bvadd | 78 |
bvmul | 130 |
bvslt | 12 |
bvsle | 9 |
bvsgt | 10 |
bvsge | 7 |
| |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
0.25 (3/4) |
Boolector |
Boolector SMT17 final boolector |
sat ✅
|
15.07800
|
27.96360
|
| |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.02500
|
597.37000
|
| |
Q3B |
Q3B default |
sat ✅
|
89.37490
|
267.65000
|
| |
Z3 |
z3-4.5.0 default |
sat ✅
|
14.05880
|
14.05680
|
|
SMT-COMP 2018
|
|
Boolector |
Boolector_default |
sat ✅
|
9.10213
|
18.04940
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
sat ✅
|
40.40290
|
40.40220
|
| |
Q3B |
Q3B_default |
sat ✅
|
4.49190
|
13.33650
|
| |
Z3 |
z3-4.7.1_default |
sat ✅
|
2.94307
|
2.94286
|
|
SMT-COMP 2020
|
0.20 (4/5) |
Bitwuzla |
Bitwuzla-fixed_default |
sat ✅
|
3.63871
|
6.64728
|
| |
CVC4 |
CVC4-sq-final_default |
sat ✅
|
639.75800
|
612.74600
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
1.74404
|
6.57601
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.3_s_default |
unknown ❌
|
1200.08000
|
4068.53000
|
| |
Z3 |
z3-4.8.8_default |
sat ✅
|
0.85972
|
0.85952
|
|
SMT-COMP 2023
|
0.17 (5/6) |
Bitwuzla |
Bitwuzla-fixed_default |
sat ✅
|
3.94121
|
3.93965
|
| |
cvc5 |
cvc5-default-2023-05-16-ea045f305_sq |
sat ✅
|
180.30200
|
162.74800
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
4.54606
|
17.82000
|
| |
Q3B |
Q3B_default |
sat ✅
|
5.53713
|
16.34890
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.9_default |
unknown ❌
|
1200.12000
|
1229.50000
|
| |
|
UltimateIntBlastingWrapper+SMTInterpol_default |
unknown ❌
|
268.36100
|
301.42900
|
| |
YicesQS |
yicesQS-2022-07-02-optim-under10_default |
sat ✅
|
0.49883
|
0.49888
|
|
SMT-COMP 2024
|
0.20 (4/5) |
Bitwuzla |
Bitwuzla |
sat ✅
|
4.22277
|
4.10682
|
| |
cvc5 |
cvc5 |
sat ✅
|
174.64309
|
174.53863
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
1201.72524
|
1231.39069
|
| |
YicesQS |
YicesQS |
sat ✅
|
0.37200
|
0.25563
|
| |
Z3alpha |
Z3-alpha |
sat ✅
|
6.67569
|
6.56744
|