Benchmark
non-incremental/BV/2017-Preiner-scholl-smt08/RNDPRE/RNDPRE_4_53.smt2
Scholl, Christoph; Disch, Stefan; Pigorsch, Florian and Kupferschmid,
Stefan; Using an SMT Solver and Craig Interpolation to Detect and Remove
Redundant Linear Constraints in Representations of Non-Convex Polyhedra.
Proceedings of 6th International Workshop on Satisfiability Modulo
Theories, Princeton, USA, July 2008.
<http://abs.informatik.uni-freiburg.de/smtbench/>
Translated to BV by Mathias Preiner.
| Benchmark |
| Size | 15692 |
| Compressed Size | 3408 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | random |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | sat |
| Size | 15684 |
| Compressed Size | 3453 |
| Max. Term Depth | 21 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 4 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 17 |
or | 59 |
and | 62 |
= | 41 |
forall | 2 |
exists | 2 |
let | 1 |
BitVec | 4 |
bvneg | 176 |
bvadd | 247 |
bvmul | 297 |
bvslt | 17 |
bvsle | 18 |
bvsgt | 28 |
bvsge | 18 |
| |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
0.75 (1/4) |
Boolector |
Boolector SMT17 final boolector |
sat ✅
|
39.80060
|
71.97490
|
| |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.01900
|
596.10000
|
| |
Q3B |
Q3B default |
unknown ❌
|
600.04300
|
1799.47000
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.10500
|
599.90000
|
|
SMT-COMP 2018
|
0.75 (1/4) |
Boolector |
Boolector_default |
unknown ❌
|
1200.02000
|
2399.41000
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
sat ✅
|
781.10700
|
756.28500
|
| |
Q3B |
Q3B_default |
unknown ❌
|
1200.08000
|
3599.19000
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.06000
|
1199.83000
|
|
SMT-COMP 2021
|
0.50 (2/4) |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
150.49600
|
593.15000
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.6_default |
unknown ❌
|
1200.02000
|
1238.86000
|
| |
YicesQS |
yices-QS-2021-06-13under10_default |
sat ✅
|
44.07390
|
44.07010
|
| |
Z3 |
z3-4.8.11_default |
unknown ❌
|
1200.11000
|
1199.87000
|
|
SMT-COMP 2023
|
0.33 (4/6) |
Bitwuzla |
Bitwuzla-fixed_default |
sat ✅
|
107.46000
|
107.42500
|
| |
cvc5 |
cvc5-default-2023-05-16-ea045f305_sq |
unknown ❌
|
1200.02000
|
1116.62000
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
60.19620
|
237.57000
|
| |
Q3B |
Q3B_default |
sat ✅
|
0.09847
|
0.09840
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.9_default |
unknown ❌
|
1028.44000
|
1061.25000
|
| |
|
UltimateIntBlastingWrapper+SMTInterpol_default |
unknown ❌
|
1200.03000
|
1246.41000
|
| |
YicesQS |
yicesQS-2022-07-02-optim-under10_default |
sat ✅
|
154.61600
|
154.59400
|
|
SMT-COMP 2024
|
0.60 (2/5) |
Bitwuzla |
Bitwuzla |
sat ✅
|
58.38605
|
58.26658
|
| |
cvc5 |
cvc5 |
unknown ❌
|
1201.71937
|
1201.03010
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
211.11185
|
242.85426
|
| |
YicesQS |
YicesQS |
sat ✅
|
736.50919
|
736.08978
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.72204
|
1200.89609
|