Benchmark
non-incremental/BV/2017-Preiner-scholl-smt08/RNDPRE/RNDPRE_4_31.smt2
Scholl, Christoph; Disch, Stefan; Pigorsch, Florian and Kupferschmid,
Stefan; Using an SMT Solver and Craig Interpolation to Detect and Remove
Redundant Linear Constraints in Representations of Non-Convex Polyhedra.
Proceedings of 6th International Workshop on Satisfiability Modulo
Theories, Princeton, USA, July 2008.
<http://abs.informatik.uni-freiburg.de/smtbench/>
Translated to BV by Mathias Preiner.
| Benchmark |
| Size | 10491 |
| Compressed Size | 2451 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | random |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unknown |
| Inferred Status | None |
| Size | 10483 |
| Compressed Size | 2450 |
| Max. Term Depth | 20 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 4 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 10 |
or | 40 |
and | 37 |
= | 25 |
forall | 2 |
exists | 2 |
let | 1 |
BitVec | 4 |
bvneg | 120 |
bvadd | 158 |
bvmul | 198 |
bvslt | 12 |
bvsle | 18 |
bvsgt | 11 |
bvsge | 12 |
| |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
1.00 (0/4) |
Boolector |
Boolector SMT17 final boolector |
unknown ❌
|
600.02000
|
1199.96000
|
| |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.02700
|
596.74000
|
| |
Q3B |
Q3B default |
unknown ❌
|
600.02700
|
1799.67000
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.03800
|
599.77000
|
|
SMT-COMP 2018
|
1.00 (0/4) |
Boolector |
Boolector_default |
unknown ❌
|
1200.03000
|
2399.82000
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.02000
|
1106.09000
|
| |
Q3B |
Q3B_default |
unknown ❌
|
1200.02000
|
3599.17000
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.02000
|
1200.04000
|
|
SMT-COMP 2020
|
1.00 (0/5) |
Bitwuzla |
Bitwuzla-fixed_default |
unknown ❌
|
1200.03000
|
2399.22000
|
| |
CVC4 |
CVC4-sq-final_default |
unknown ❌
|
1200.02000
|
1172.57000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.09000
|
4724.60000
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.3_s_default |
unknown ❌
|
1200.08000
|
3423.22000
|
| |
Z3 |
z3-4.8.8_default |
unknown ❌
|
1200.07000
|
1199.74000
|
|
SMT-COMP 2022
|
1.00 (0/8) |
Bitwuzla |
Bitwuzla-wrapped_default |
unknown ❌
|
1200.12000
|
1199.80000
|
| |
cvc5 |
cvc5-default-2022-07-02-b15e116-wrapped_sq |
unknown ❌
|
1200.03000
|
1176.57000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.07000
|
4733.57000
|
| |
Q3B |
Q3B_default |
unknown ❌
|
1200.06000
|
3599.55000
|
| |
Q3B-pBNN |
Q3B-pBDD SMT-COMP 2022 final_default |
unknown ❌
|
1200.03000
|
3598.91000
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.7-wrapped_default |
unknown ❌
|
1041.82000
|
1073.29000
|
| |
YicesQS |
yicesQS-2022-07-02-optim-under10_default |
unknown ❌
|
1200.11000
|
1199.91000
|
| |
Z3 |
z3-4.8.17_default |
unknown ❌
|
1200.09000
|
1199.10000
|
|
SMT-COMP 2024
|
1.00 (0/5) |
Bitwuzla |
Bitwuzla |
unknown ❌
|
1201.24233
|
1201.10405
|
| |
cvc5 |
cvc5 |
unknown ❌
|
1201.72271
|
1201.00312
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
5.64945
|
16.94433
|
| |
YicesQS |
YicesQS |
unknown ❌
|
1201.72062
|
1200.89559
|
| |
Z3alpha |
Z3-alpha |
unknown ❌
|
1201.72219
|
1201.25540
|
|
SMT-COMP 2025
|
1.00 (0/5) |
Bitwuzla |
Bitwuzla |
unknown ❌
|
1201.33343
|
1201.05091
|
| |
cvc5 |
cvc5 |
unknown ❌
|
1201.77607
|
1200.96250
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
2.86989
|
8.24141
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT |
unknown ❌
|
1202.28983
|
1216.86507
|
| |
YicesQS |
YicesQS |
unknown ❌
|
1201.77636
|
1201.03294
|