Benchmark
non-incremental/BV/2017-Preiner-scholl-smt08/RND/RND_3_18.smt2
Scholl, Christoph; Disch, Stefan; Pigorsch, Florian and Kupferschmid,
Stefan; Using an SMT Solver and Craig Interpolation to Detect and Remove
Redundant Linear Constraints in Representations of Non-Convex Polyhedra.
Proceedings of 6th International Workshop on Satisfiability Modulo
Theories, Princeton, USA, July 2008.
<http://abs.informatik.uni-freiburg.de/smtbench/>
Translated to BV by Mathias Preiner.
| Benchmark |
|---|
| Size | 3565 |
| Compressed Size | 1084 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | random |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | sat |
| Inferred Status | sat |
| Size | 3557 |
| Compressed Size | 1081 |
| Max. Term Depth | 14 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 4 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 5 |
or | 11 |
and | 14 |
= | 7 |
forall | 2 |
exists | 2 |
BitVec | 4 |
bvneg | 44 |
bvadd | 33 |
bvmul | 59 |
bvslt | 7 |
bvsle | 4 |
bvsgt | 3 |
bvsge | 5 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
0.50 (2/4) |
Boolector |
Boolector SMT17 final boolector |
sat ✅
|
2.96929
|
3.05069
|
| |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.10600
|
594.76100
|
| |
Q3B |
Q3B default |
unknown ❌
|
600.08200
|
1799.75000
|
| |
Z3 |
z3-4.5.0 default |
sat ✅
|
0.18288
|
0.18214
|
|
SMT-COMP 2018
|
|
Boolector |
Boolector_default |
sat ✅
|
0.11590
|
0.19852
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
sat ✅
|
615.34700
|
603.41100
|
| |
Q3B |
Q3B_default |
sat ✅
|
0.39845
|
1.13556
|
| |
Z3 |
z3-4.7.1_default |
sat ✅
|
0.12266
|
0.12258
|
|
SMT-COMP 2020
|
|
Bitwuzla |
Bitwuzla-fixed_default |
sat ✅
|
0.16530
|
0.26886
|
| |
CVC4 |
CVC4-sq-final_default |
sat ✅
|
265.44100
|
261.61600
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
0.02809
|
0.00695
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.3_s_default |
sat ✅
|
2.61982
|
3.71857
|
| |
Z3 |
z3-4.8.8_default |
sat ✅
|
0.04165
|
0.04160
|
|
SMT-COMP 2023
|
|
Bitwuzla |
Bitwuzla-fixed_default |
sat ✅
|
0.93353
|
0.93344
|
| |
cvc5 |
cvc5-default-2023-05-16-ea045f305_sq |
sat ✅
|
617.03800
|
603.55300
|
| |
Par4 |
Par4-wrapped-sq_default |
sat ✅
|
0.08890
|
0.00639
|
| |
Q3B |
Q3B_default |
sat ✅
|
0.49333
|
1.33908
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.9_default |
sat ✅
|
12.75790
|
19.60080
|
| |
|
UltimateIntBlastingWrapper+SMTInterpol_default |
sat ✅
|
4.40131
|
11.38630
|
| |
YicesQS |
yicesQS-2022-07-02-optim-under10_default |
sat ✅
|
0.06829
|
0.06832
|
|
SMT-COMP 2024
|
0.40 (3/5) |
Bitwuzla |
Bitwuzla |
sat ✅
|
1.54025
|
1.43909
|
| |
cvc5 |
cvc5 |
unknown ❌
|
1201.71960
|
1200.47776
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
139.40946
|
157.24468
|
| |
YicesQS |
YicesQS |
sat ✅
|
0.29271
|
0.19283
|
| |
Z3alpha |
Z3-alpha |
sat ✅
|
0.27049
|
0.17128
|
|
SMT-COMP 2025
|
0.40 (3/5) |
Bitwuzla |
Bitwuzla |
sat ✅
|
0.55528
|
0.42850
|
| |
cvc5 |
cvc5 |
unknown ❌
|
1201.78709
|
1200.97112
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
1201.38292
|
1213.23794
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT |
sat ✅
|
68.49851
|
77.24790
|
| |
YicesQS |
YicesQS |
sat ✅
|
0.29320
|
0.16447
|