Benchmark
non-incremental/BV/2017-Preiner-scholl-smt08/RND/RND_6_39.smt2
Scholl, Christoph; Disch, Stefan; Pigorsch, Florian and Kupferschmid,
Stefan; Using an SMT Solver and Craig Interpolation to Detect and Remove
Redundant Linear Constraints in Representations of Non-Convex Polyhedra.
Proceedings of 6th International Workshop on Satisfiability Modulo
Theories, Princeton, USA, July 2008.
<http://abs.informatik.uni-freiburg.de/smtbench/>
Translated to BV by Mathias Preiner.
| Benchmark |
|---|
| Size | 118509 |
| Compressed Size | 20279 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | random |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unknown |
| Inferred Status | None |
| Size | 118501 |
| Compressed Size | 20286 |
| Max. Term Depth | 29 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 7 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 110 |
or | 324 |
and | 317 |
= | 197 |
forall | 32 |
exists | 36 |
let | 22 |
BitVec | 68 |
bvneg | 1541 |
bvadd | 2345 |
bvmul | 2621 |
bvslt | 111 |
bvsle | 97 |
bvsgt | 122 |
bvsge | 115 |
| |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
1.00 (0/4) |
Boolector |
Boolector SMT17 final boolector |
unknown ❌
|
600.04700
|
1199.84000
|
| |
CVC4 |
CVC4-smtcomp2017-main default |
unknown ❌
|
600.07300
|
588.61000
|
| |
Q3B |
Q3B default |
unknown ❌
|
600.03500
|
1799.63000
|
| |
Z3 |
z3-4.5.0 default |
unknown ❌
|
600.02200
|
599.89000
|
|
SMT-COMP 2018
|
1.00 (0/4) |
Boolector |
Boolector_default |
unknown ❌
|
1200.02000
|
2399.80000
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unknown ❌
|
1200.08000
|
999.56000
|
| |
Q3B |
Q3B_default |
unknown ❌
|
1200.02000
|
3598.29000
|
| |
Z3 |
z3-4.7.1_default |
unknown ❌
|
1200.03000
|
1199.91000
|
|
SMT-COMP 2022
|
1.00 (0/8) |
Bitwuzla |
Bitwuzla-wrapped_default |
unknown ❌
|
1200.07000
|
1199.72000
|
| |
cvc5 |
cvc5-default-2022-07-02-b15e116-wrapped_sq |
unknown ❌
|
1200.03000
|
1074.27000
|
| |
Par4 |
Par4-wrapped-sq_default |
unknown ❌
|
1200.13000
|
4520.26000
|
| |
Q3B |
Q3B_default |
unknown ❌
|
1200.06000
|
3593.29000
|
| |
Q3B-pBNN |
Q3B-pBDD SMT-COMP 2022 final_default |
unknown ❌
|
1200.04000
|
3594.30000
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT-5.6.7-wrapped_default |
unknown ❌
|
1100.62000
|
1123.48000
|
| |
YicesQS |
yicesQS-2022-07-02-optim-under10_default |
unknown ❌
|
1200.02000
|
1199.99000
|
| |
Z3 |
z3-4.8.17_default |
unknown ❌
|
1200.12000
|
1200.08000
|
|
SMT-COMP 2025
|
1.00 (0/5) |
Bitwuzla |
Bitwuzla |
unknown ❌
|
1201.44743
|
1201.03710
|
| |
cvc5 |
cvc5 |
unknown ❌
|
1201.75156
|
1201.09475
|
| |
SMTInterpol |
SMTInterpol |
unknown ❌
|
1201.48415
|
1227.45649
|
| |
UltimateEliminator |
UltimateEliminator+MathSAT |
unknown ❌
|
908.85595
|
923.74677
|
| |
YicesQS |
YicesQS |
unknown ❌
|
1201.75277
|
1201.01189
|