Benchmark
non-incremental/BV/2017-Preiner-scholl-smt08/RND/RND_3_19.smt2
Scholl, Christoph; Disch, Stefan; Pigorsch, Florian and Kupferschmid,
Stefan; Using an SMT Solver and Craig Interpolation to Detect and Remove
Redundant Linear Constraints in Representations of Non-Convex Polyhedra.
Proceedings of 6th International Workshop on Satisfiability Modulo
Theories, Princeton, USA, July 2008.
<http://abs.informatik.uni-freiburg.de/smtbench/>
Translated to BV by Mathias Preiner.
| Benchmark |
|---|
| Size | 4914 |
| Compressed Size | 1304 |
| License |
Creative Commons Attribution 4.0 International
(CC-BY-4.0)
|
| Category | random |
| First Occurrence | 2017-07-23 |
| Generated By | — |
| Generated On | — |
| Generator | — |
| Dolmen OK | 1 |
| strict Dolmen OK | 1 |
| check-sat calls | 1 |
| Status | unsat |
| Inferred Status | unsat |
| Size | 4906 |
| Compressed Size | 1292 |
| Max. Term Depth | 15 |
| Asserts | 1 |
| Declared Functions | 0 |
| Declared Constants | 4 |
| Declared Sorts | 0 |
| Defined Functions | 0 |
| Defined Recursive Functions | 0 |
| Defined Sorts | 0 |
| Constants | 0 |
| Declared Datatypes | 0 |
Symbols
not | 7 |
or | 13 |
and | 22 |
= | 11 |
forall | 11 |
exists | 15 |
BitVec | 26 |
bvneg | 46 |
bvadd | 38 |
bvmul | 74 |
bvslt | 4 |
bvsle | 5 |
bvsgt | 6 |
bvsge | 10 |
| | | |
Evaluations
| Evaluation |
Rating |
Solver |
Variant |
Result |
Wallclock |
CPU Time |
|
SMT-COMP 2017
|
0.25 (3/4) |
Boolector |
Boolector SMT17 final boolector |
unsat ✅
|
3.91216
|
4.01199
|
| |
CVC4 |
CVC4-smtcomp2017-main default |
unsat ✅
|
0.07460
|
0.07337
|
| |
Q3B |
Q3B default |
unknown ❌
|
600.02400
|
1799.64000
|
| |
Z3 |
z3-4.5.0 default |
unsat ✅
|
0.08419
|
0.08342
|
|
SMT-COMP 2018
|
|
Boolector |
Boolector_default |
unsat ✅
|
0.13792
|
0.23903
|
| |
CVC4 |
master-2018-06-10-b19c840-competition-default_default |
unsat ✅
|
0.93715
|
0.93727
|
| |
Q3B |
Q3B_default |
unsat ✅
|
0.15176
|
0.38881
|
| |
Z3 |
z3-4.7.1_default |
unsat ✅
|
0.08561
|
0.08550
|