Benchmark

non-incremental/UFDTLIA/20241211-verus/systems/noderep-smt-spec__unbounded_log_refines_simplelog.9.smt2

Benchmarks generated by the Rust verifier Verus (https://verus-lang.github.io/verus/guide/) on the project Verus Systems (https://dl.acm.org/doi/10.1145/3694715.3695952) 
and processed using Mariposa (https://github.com/secure-foundations/mariposa).
This benchmarks was originally run with z3 with the following options:
    (set-option :auto_config false)
    (set-option :smt.mbqi false)
    (set-option :smt.case_split 3)
    (set-option :smt.qi.eager_threshold 100.0)
    (set-option :smt.delay_units true)
    (set-option :smt.arith.solver 2)
    (set-option :smt.arith.nl false)
    (set-option :pi.enabled false)
    (set-option :rewriter.sort_disjunctions false)
Benchmark
Size525168
Compressed Size43748
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categoryindustrial
First Occurrence2025-08-11
Generated ByAmar Shah
Generated On2024-12-11 00:00:00
GeneratorVerus
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unsat
Inferred Status None
Size 525160
Compressed Size43739
Max. Term Depth51
Asserts 852
Declared Functions532
Declared Constants237
Declared Sorts 14
Defined Functions41
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes18

Symbols

true32 false14 Bool50 ite62
not68 or8 and597 =>628
=780 distinct1 forall756 exists6
let446 Int125 +2 -6
<67 <=214 >4 >=3
Char3

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT-COMP 2025 0.67 (1/3) cvc5 cvc5 unsat ✅ 1.73503 1.61274
iProver iProver v3.9.3 unknown ❌ 1201.76240 4766.33169
SMTInterpol SMTInterpol unknown ❌ 1201.74942 1918.04796