Benchmark

non-incremental/QF_IDL/job_shop/jobshop46-2-23-23-4-4-11.smt2

Job_Shop_Scheduling Problem from Papadimitriou-Steiglitz is translated by Hyondeuk Kim in SMT-LIB format benchmark
Benchmark
Size173760
Compressed Size9257
License Creative Commons Attribution 4.0 International (CC-BY-4.0)
Categorycrafted
First Occurrence2006-08-21
Generated By
Generated On
Generator
Dolmen OK1
strict Dolmen OK1
check-sat calls1
Query 1
Status unknown
Inferred Status None
Size 173752
Compressed Size9146
Max. Term Depth6
Asserts 1
Declared Functions0
Declared Constants185
Declared Sorts 0
Defined Functions0
Defined Recursive Functions 0
Defined Sorts0
Constants0
Declared Datatypes0

Symbols

not2070 or2070 and1 =2070
let1 -6440 <=138 >=4324

Evaluations

Evaluation Rating Solver Variant Result Wallclock CPU Time
SMT Evaluation 2013 1.00 (0/5) CVC3 CVC3-SMT-COMP-2010 default unknown ❌
CVC3-SMT-COMP-2011 default unknown ❌
CVC3-SMT-COMP-2012 default unknown ❌
CVC4 CVC4-SMT-COMP-2012-Resubmission default unknown ❌
CVC4-SMT-EVAL-2013 default unknown ❌
OpenSMT OpenSMT-SMT-COMP-2010 default unknown ❌
OpenSMT-SMT-COMP-2011 default unknown ❌
veriT veriT-SMT-COMP-2010 default unknown ❌
veriT-SMT-COMP-2011 default unknown ❌
veriT-SMT-EVAL-2013 default unknown ❌
Z3 Z3-4.3.2.a054b099c1d6-x64-debian-6.0.6-SMT-EVAL-2013 default unknown ❌
Z3-SMT-COMP-2011 default unknown ❌
SMT-COMP 2017 1.00 (0/5) CVC4 CVC4-smtcomp2017-main default unknown ❌ 600.02100 599.91000
SMTInterpol SMTInterpol default unknown ❌ 600.03600 654.65000
veriT veriT-2017-06-17 default unknown ❌ 600.10000 600.03100
Yices2 Yices2-Main default unknown ❌ 600.08700 600.01400
Z3 z3-4.5.0 default unknown ❌ 600.06200 600.07500
SMT-COMP 2018 1.00 (0/7) CVC4 CVC4-experimental-idl-2_default unknown ❌ 1200.07000 1199.91000
master-2018-06-10-b19c840-competition-default_default unknown ❌ 1200.10000 1200.06000
MathSAT mathsat-5.5.2-linux-x86_64-Main_default unknown ❌ 1200.08000 1199.82000
SMTInterpol SMTInterpol-2.5-19-g0d39cdee_default unknown ❌ 1200.12000 1284.41000
SMT-RAT SMTRAT-Rat-final_default unknown ❌ 1200.06000 1199.97000
veriT veriT_default unknown ❌ 1200.08000 1200.05000
Yices2 Yices 2.6.0_default unknown ❌ 1200.07000 1200.07000
Z3 z3-4.7.1_default unknown ❌ 1200.04000 1200.01000
SMT-COMP 2019 1.00 (0/7) CVC4 CVC4-2019-06-03-d350fe1-wrapped-sq_default unknown ❌ 2400.02000 2399.38000
Par4 Par4-wrapped-sq_default unknown ❌ 2400.10000 9508.45000
ProB ProB-wrapped-sq_default unknown ❌ 2400.03000 2400.02000
SMTInterpol smtinterpol-2.5-514-wrapped-sq_default unknown ❌ 2400.13000 2421.67000
veriT veriT-wrapped-sq_default unknown ❌ 2400.03000 2399.99000
Yices2 Yices 2.6.0_default unknown ❌ 2400.08000 2399.92000
Yices 2.6.2-wrapped-sq_default unknown ❌ 2400.02000 2399.80000
Z3 z3-4.8.4-d6df51951f4c-wrapped-sq_default unknown ❌ 2400.06000 2399.91000
SMT-COMP 2024 1.00 (0/5) cvc5 cvc5 unknown ❌ 1201.71560 1200.94127
OpenSMT OpenSMT unknown ❌ 1201.21381 1200.93501
SMTInterpol SMTInterpol unknown ❌ 1202.24240 1306.48868
Yices2 Yices2 unknown ❌ 1201.21197 1201.00956
Z3alpha Z3-alpha unknown ❌ 1201.71586 1201.04894